Abstract: A memory device is described. A first conductive layer extends in a first direction. A second conductive layer extends in the first direction. A third conductive layer extends in a second direction intersecting the first direction. A first oxide region is disposed between the first conductive layer and the third conductive layer and between the second conductive layer and the third conductive layer. A semiconductor region is disposed between the first conductive layer and the first oxide region and between the first conductive layer and the second conductive layer. A second distance between the semiconductor region, which is disposed between the first conductive layer and the second conductive layer, and the third conductive layer, is longer than a first distance between the semiconductor region, which is disposed between the first conductive layer and the first oxide region, and the third conductive layer.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a first signal line, a first conductive layer, a first storage layer and a first insulation layer. The first signal line extends in a first direction crossing the substrate. The first conductive layer extends in a second direction crossing the first direction and being parallel to the substrate, and has a first surface and a second surface that is away from the first signal line in a third direction crossing the first and second directions. The first storage layer is provided between the first signal line and the first conductive layer. The first insulation layer is provided between the second surface and the first storage layer.

Abstract: Disclosed is an image analysis method implemented by a computer, the method including analyzing a partial image which is a part of an image of a planar subject, generating partial-image analysis data representing a characteristic of the partial image, comparing, for each of a plurality of images, candidate-image analysis data with the partial-image analysis data, the candidate-image analysis data representing a characteristic of each of the plurality of images, and selecting a candidate image among the plurality of images, the candidate image including a part corresponding to the partial image.

Abstract: A storage device includes a first conductor, a resistance variable film, and a second conductor. The resistance variable film includes a first layer and a second layer. The second layer is located on a side opposite to the first conductor with respect to the first layer, contains oxygen, and has conductivity higher than that of the first layer. The second conductor includes a first portion and a second portion. The first portion abuts on the second layer of the resistance variable film. The second portion is separated from the resistance variable film as compared to the first portion. The oxygen content of the first portion is higher than that of the second portion.

Abstract: An image processing apparatus includes a processor and a memory having stored thereon instructions executable by the processor to cause the image processing apparatus to perform: calculating, with respect to each of a plurality of captured images obtained by successively capturing a subject, an evaluation index as an index as to whether a capturing condition is appropriate or not for each of a plurality of partial images of the each of the plurality of captured images corresponding to different areas of the subject; selecting the plurality of partial images corresponding to the different areas of the subject from the plurality of captured images based on the evaluation indices of the partial images; and synthesizing the plurality of selected partial images in positions corresponding to partial images in a reference image obtained by capturing the subject.

Abstract: A semiconductor memory device includes a stacked body including insulating layers and gate electrode layers alternately stacked in a direction, a semiconductor layer extending in the direction, and a gate insulating layer provided between the semiconductor layer and the gate electrode layer, and including a first layer, a second layer, and a third layer between the first layer and the second layer. The first layer includes a first insulator, the second layer includes at least one oxide selected from aluminum oxide, yttrium oxide, lanthanum oxide, gadolinium oxide, ytterbium oxide, hafnium oxide, and zirconium oxide, the third layer includes at least one material selected from silicon, germanium, silicon germanium and silicon carbide, and the third layer is positioned between the semiconductor layer and the insulating layer.

Abstract: Disclosed is a learning model generation method executed by a computer, including: striking a percussion instrument with a striking member to emit a musical sound; and conducting machine learning upon receiving an input of the musical sound emitted from the percussion instrument, and generating, based on the machine learning, a learning model for outputting numerical values for setting musical performance parameters for an automatic musical performance of the percussion instrument that is struck when the striking member is driven.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a first interconnect layer provided above a semiconductor substrate; a plurality of second interconnect layers provided above the first interconnect layer; a semiconductor layer electrically coupled to the first interconnect layer; a first insulating layer provided between the semiconductor layer and the plurality of second interconnect layers; and a plurality of first oxide layers in which one side of the first oxide layers is in contact with the plurality of second interconnect layers while the other side of the first oxide layers is in contact with the first insulating layer, and a voltage is applied to the plurality of second interconnect layers to vary a resistance value.

Abstract: According to embodiments, a semiconductor memory device includes a first electrode, a second electrode, a memory cell, and a control circuit. The memory cell is provided between the first electrode and the second electrode and includes a metal film and a resistance change film. The control circuit applies a voltage between the first electrode and the second electrode to perform transition of a resistive state of the memory cell. The control circuit performs a first writing operation by applying a first pulse having a voltage of a first polarity to the memory cell and applying a second pulse having a voltage of the first polarity smaller than the voltage of the first pulse to the memory cell continuously after applying the first pulse.

Abstract: A storage device includes: a first conductive layer; a second conductive layer; and a resistance-variable layer disposed between the first conductive layer and the second conductive layer, and including a first chalcogenide containing a first element which is either silicon or germanium. An insulating layer is disposed in a second direction perpendicular to a first direction from the first conductive layer to the second conductive layer with respect to the resistance-variable layer. A first region is disposed between the resistance-variable layer and the insulating layer, and has a third concentration of the first element higher than both a first concentration of the first element in the resistance-variable layer and a second concentration of the first element in the insulating layer.

Abstract: An image correction device includes a line segment detection module, a shape specification module and an image correction module. The line segment detection module detects from a captured image obtained by photographing a document a plurality of line segments that correspond to the notation on the surface of the document. The shape specification module specifies shape approximation lines that approximate the surface shape of the document from the plurality of line segments. The image correction module utilizes the shape approximation lines specified by the shape specification module to correct the captured image.

Abstract: A semiconductor memory device includes a stacked body including insulating layers and gate electrode layers alternately stacked in a direction, a semiconductor layer extending in the direction, and a gate insulating layer provided between the semiconductor layer and the gate electrode layer, and including a first layer, a second layer, and a third layer between the first layer and the second layer. The first layer includes a first insulator, the second layer includes at least one oxide selected from aluminum oxide, yttrium oxide, lanthanum oxide, gadolinium oxide, ytterbium oxide, hafnium oxide, and zirconium oxide, the third layer includes at least one material selected from silicon, germanium, silicon germanium and silicon carbide, and the third layer is positioned between the semiconductor layer and the insulating layer.

Abstract: A storage device includes: a first conductive layer; a second conductive layer; and a resistance-variable layer disposed between the first conductive layer and the second conductive layer, and including a first chalcogenide containing a first element which is either silicon or germanium. An insulating layer is disposed in a second direction perpendicular to a first direction from the first conductive layer to the second conductive layer with respect to the resistance-variable layer. A first region is disposed between the resistance-variable layer and the insulating layer, and has a third concentration of the first element higher than both a first concentration of the first element in the resistance-variable layer and a second concentration of the first element in the insulating layer.

Abstract: A storage device includes a first conductor, a resistance variable film, and a second conductor. The resistance variable film includes a first layer and a second layer. The second layer is located on a side opposite to the first conductor with respect to the first layer, contains oxygen, and has conductivity higher than that of the first layer. The second conductor includes a first portion and a second portion. The first portion abuts on the second layer of the resistance variable film. The second portion is separated from the resistance variable film as compared to the first portion. The oxygen content of the first portion is higher than that of the second portion.

Abstract: A storage apparatus of the present disclosure includes a plurality of storing units having different life times, and a processor configured to manage a data block to be stored in the plurality of storing units. The processor is configured to determine or infer an access characteristic for the data block, and store the data block in a storing unit in accordance with the determined or inferred access characteristic, among the plurality of storing units having the different life times. This enables to extend the life times of the storing units.

Abstract: An automatic performance system includes a sign detector configured to detect a sign action of a performer performing a musical piece, a performance analyzer configured to sequentially estimates a performance position in the musical piece by analyzing an acoustic signal representing performed sound in parallel with the performance, and a performance controller configured to control an automatic performance device to carry out an automatic performance of the musical piece so that the automatic performance is synchronized with the sign action detected by the sign detector and a progress of the performance position estimated by the performance analyzer.

Abstract: The present disclosure relates to an apparatus the for verification, calibration, and/or adjustment of a measuring instrument. The apparatus includes the measuring instrument, a reference measuring instrument, and a smart device. The apparatus performs a measuring operation in which the measuring instrument determines a value of a variable of the medium and the reference instrument determines a reference value of the variable from a sample of the medium. The measuring instrument communicates wirelessly and performs the verification, calibration, and/or adjustment on the basis of the measured value and the associated reference value. The reference measuring instrument is portable and communicates wirelessly with the smart device and the measuring instrument. An application executed on the smart device controls a data transfer between the measuring instrument, the reference measuring device, and/or the device that is required for executing the verification, calibration, and/or adjustment.

Abstract: A musical score image analyzer includes a processor and a memory having stored thereon instructions executable by the processor to cause the musical score image analyzer to perform: detecting musical symbols in a musical score image obtained by capturing a musical score having a plurality of staffs arranged in parallel to each other and the musical symbols respectively disposed in prescribed positions in the staffs; specifying a symbol column having the detected musical symbols which are arranged in a column; calculating an index relating an image capturing based on the symbol column; and instructing a capturing device to perform capturing operation of a still image for the musical score image when the index satisfies a prescribed condition.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a first signal line, a first conductive layer, a first storage layer and a first insulation layer. The first signal line extends in a first direction crossing the substrate. The first conductive layer extends in a second direction crossing the first direction and being parallel to the substrate, and has a first surface and a second surface that is away from the first signal line in a third direction crossing the first and second directions. The first storage layer is provided between the first signal line and the first conductive layer. The first insulation layer is provided between the second surface and the first storage layer.

Abstract: According to one embodiment, a memory device includes a first electrode; a variable resistance layer provided on the first electrode, the variable resistance layer including a chalcogenide compound having a crystal structure; and a second electrode provided on the variable resistance layer. The variable resistance layer includes a first region covering one of an upper surface of the first electrode or a lower surface of the second electrode, and a second region, a concentration of the chemical element being lower in the second region than in the first region.