Abstract: A semiconductor device with a space-saving design of common power lines shared by a plurality of function macros. An LSI chip has a plurality of wiring layers, a moisture-protective ring, and a plurality of function macros (e.g., I/O macros and I/O macro groups). Each function macro has a VSS power supply terminal that is electrically connected to the moisture-protective ring. This connection enables the moisture-protective ring to function as part of a common VSS power line for the function macros. The proposed architecture reduces the space required for routing VSS power lines inside the moisture-protective ring, thus contributing to space-saving LSI designs.

Abstract: In a semiconductor integrated circuit device, an n-channel transistor area has an area A on a pad side and an area B on an internal circuit side, where a plurality of protective elements are connected in parallel between a signal line and a power supply line. Each of the protective elements has resistors. Resistance of the resistors in the area A is set higher than resistance of the resistors in the area B by a value corresponding to resistance of parasitic resistance of the signal line included in the area A so that the resistance of the protective elements in the areas A and B are the same or almost the same as each other. A p-channel transistor area has the same configuration as that of the p-channel transistor area.

Abstract: A protection circuit in a semiconductor integrated circuit having a master slice I/O circuit comprises an internal circuit, a pad, and a desired number of protection elements connected in parallel between the internal circuit and the pad. Each protection element includes a P-channel MOS transistor which outputs a first power supply voltage level signal on the basis of an output signal of the internal circuit, a N-channel MOS transistor which outputs a second power supply voltage level signal on the basis of the output signal of the internal circuit, a resistor connected between a signal line connected to the pad and an output terminal of the P-channel MOS transistor, and a resistor connected between the signal line and an output terminal of the N-channel MOS transistor.

Abstract: A protection circuit in a semiconductor integrated circuit having a master slice I/O circuit comprises an internal circuit, a pad, and a desired number of protection elements connected in parallel between the internal circuit and the pad. Each protection element includes a P-channel MOS transistor which outputs a first power supply voltage level signal on the basis of an output signal of the internal circuit, a N-channel MOS transistor which outputs a second power supply voltage level signal on the basis of the output signal of the internal circuit, a resistor connected between a signal line connected to the pad and an output terminal of the P-channel MOS transistor, and a resistor connected between the signal line and an output terminal of the N-channel MOS transistor.

Abstract: A compander circuit includes first and second volume controllers, a comparator, a counter and a control part. The comparator compares a compared voltage with a rectified and smoothed signal of an input signal of the compander circuit or an output signal of the first volume controller receiving the input signal, the compared voltage being an output signal of the second volume controller. The counter executes a count operation on an output signal of the comparator in synchronism with a clock signal and controls gains of the first and second volume controllers on the basis of a counter value of the counter. The control part controls a frequency of the clock signal applied to the counter by a predetermined control signal.

Abstract: In a half-wave rectifier circuit for obtaining an DC voltage output depending on the level of an input signal through half-wave rectification of the input signal, an input voltage from which a DC component is removed by a capacitor is input to a switch circuit. This input voltage includes an offset voltage which is generated by use of the capacitor. The switch circuit outputs a half-wave rectified voltage to a smoothing circuit by switching the input voltage ON and OFF depending on the polarity of the input signal. Under the condition that an input voltage is controlled to OFF state, the switch circuit shows a high impedance viewed from the input side of the smoothing circuit. Therefore, an output voltage of the smoothing circuit is maintained when the switch circuit is in the OFF state. Thereby, the offset voltage generated by the capacitor is eliminated from the output voltage from the smoothing circuit.