Patents by Inventor Kazuhiro Mizutani

Kazuhiro Mizutani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030201709
    Abstract: A display panel module includes a substrate, a circuit board, electrode terminals aligned in a first direction over a surface of the substrate, each of the electrode terminals extending in a second direction perpendicular to the first direction, lead terminals aligned in the first direction over a confronting surface of the circuit board to the substrate, at least an anisotropically conductive film sandwiched between the electrode terminals and the lead terminals, and a plurality of first electrically insulating walls on the substrate in at least selected plural ones of gaps between selected ones of the electrode terminals and on opposite side regions of the module, the opposite side regions being distanced in the first direction and separated by a center region. The first electrically insulating walls have a first height that is higher than a first total height of the electrode terminals and the anisotropically conductive film.
    Type: Application
    Filed: May 5, 2003
    Publication date: October 30, 2003
    Applicant: NEC CORPORATION
    Inventors: Kazuhiro Mizutani, Eiichi Kitazume
  • Patent number: 6586873
    Abstract: A display panel module includes a substrate, a circuit board, electrode terminals aligned in a first direction over a surface of the substrate, each of the electrode terminals extending in a second direction perpendicular to the first direction, lead terminals aligned in the first direction over a confronting surface of the circuit board to the substrate, at least an anisotropically conductive film sandwiched between the electrode terminals and the lead terminals, and a plurality of first electrically insulating walls on the substrate in at least selected plural ones of gaps between selected ones of the electrode terminals and on opposite side regions of the module, the opposite side regions being distanced in the first direction and separated by a center region. The first electrically insulating walls have a first height that is higher than a first total height of the electrode terminals and the anisotropically conductive film.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: July 1, 2003
    Assignee: NEC Corporation
    Inventors: Kazuhiro Mizutani, Eiichi Kitazume
  • Publication number: 20020153548
    Abstract: There is provided a semiconductor device having a COB type DRAM, which comprises a first insulating film formed on a semiconductor substrate, first wiring trenches formed in a first insulating film in the first region, second wiring trenches formed in the first insulating film in the second region to have a substantially same depth as the first wiring trenches, first wirings buried in lower portions of the first wiring trenches, a second insulating film buried in upper portions of the first wiring trenches and formed of material different from the first insulating film, and second wirings formed of same conductive material as the first wirings in the second wiring trenches and formed thicker than the first wirings. Accordingly, the pattern precision of the bit lines and the wirings that have a different film thickness can be increased, and through holes that are formed between the bit lines in the self-alignment manner are formed shallow, and also resistances of the bit lines and the wirings are reduced.
    Type: Application
    Filed: June 19, 2002
    Publication date: October 24, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Kazuhiro Mizutani, Michiari Kawano
  • Patent number: 6433381
    Abstract: There is provided a semiconductor device having a COB type DRAM, which comprises a first insulating film formed on a semiconductor substrate, first wiring trenches formed in a first insulating film in the first region, second wiring trenches formed in the first insulating film in the second region to have a substantially same depth as the first wiring trenches, first wirings buried in lower portions of the first wiring trenches, a second insulating film buried in upper portions of the first wiring trenches and formed of material different from the first insulating film, and second wirings formed of same conductive material as the first wirings in the second wiring trenches and formed thicker than the first wirings. Accordingly, the pattern precision of the bit lines and the wirings that have a different film thickness can be increased, and through holes that are formed between the bit lines in the self-alignment manner are formed shallow, and also resistances of the bit lines and the wirings are reduced.
    Type: Grant
    Filed: January 9, 2001
    Date of Patent: August 13, 2002
    Assignee: Fujitsu Limited
    Inventors: Kazuhiro Mizutani, Michiari Kawano
  • Patent number: 6429585
    Abstract: An organic thin film EL panel includes a plurality of transparent electrodes, an organic film, and a plurality of metal electrodes. The transparent electrodes are formed into stripes on a transparent substrate. The organic film includes a light-emitting layer and is formed on the transparent substrate and the transparent electrodes. The plurality of metal electrodes are formed into stripes on the organic film in a direction perpendicular to the transparent electrodes. The metal electrodes are comprised of a plurality of electrode portions arranged at a predetermined interval, and a plurality of interconnections that connect adjacent ones of the electrode portions to each other. The electrode portions have pixel regions where the metal electrodes and the transparent electrodes overlie each other, and connection regions other than the pixel regions. The interconnections connect the connection regions of adjacent ones of the electrode portions to each other.
    Type: Grant
    Filed: February 8, 2000
    Date of Patent: August 6, 2002
    Assignee: NEC Corporation
    Inventors: Eiichi Kitazume, Kazuhiro Mizutani
  • Patent number: 6417034
    Abstract: A method for manufacturing an organic EL display device is provided, capable of improving an opening ratio and providing narrower pitches for narrowing non-lighting portion between pixels, and, at the same time, capable of eliminating short-circuiting between display pixels for eliminating cross-talk and non-lighting pixels. In the deposition process of the cathode 6, the incident angle of the deposition material onto the substrate is optimized by optionally changing parameters such as a distance between the substrate 1 and the mask 11 and a distance between the substrate and the point deposition source 13. Thus, deposition material from a plurality of deposition sources impinges onto the substrate surface obliquely passing at a different incident angles though opening (slits 11a) of the mask 11, so that the width 10 of the electrode pattern 6 becomes broader than the width of the slit by superposition of the deposition material passing through the slits at different incident angles.
    Type: Grant
    Filed: April 30, 2001
    Date of Patent: July 9, 2002
    Assignee: NEC Corporation
    Inventors: Eiichi Kitazume, Kazuhiro Mizutani
  • Patent number: 6390874
    Abstract: An organic electroluminescent display device comprising a transparent supporting substrate, a transparent anode of a plurality of stripes provided on the transparent supporting substrate, an organic electroluminescent layer extending over the transparent supporting substrate and the transparent anode, and a cathode of a plurality of stripes which extend in a direction perpendicular to a direction along which the stripes of the anode extend, wherein at least an insulative separation wall is provided between the stripes of the anode and the insulative separation wall has a height which is higher than a sum of a thickness of the anode and a thickness of the organic electroluminescent layer and further wherein the organic electroluminescent layer also extends over the insulative separation wall.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: May 21, 2002
    Assignee: NEC Corporation
    Inventors: Kazuhiro Mizutani, Shigeyoshi Ootsuki
  • Publication number: 20020014648
    Abstract: There is provided a semiconductor device having a COB type DRAM, which comprises a first insulating film formed on a semiconductor substrate, first wiring trenches formed in a first insulating film in the first region, second wiring trenches formed in the first insulating film in the second region to have a substantially same depth as the first wiring trenches, first wirings buried in lower portions of the first wiring trenches, a second insulating film buried in upper portions of the first wiring trenches and formed of material different from the first insulating film, and second wirings formed of same conductive material as the first wirings in the second wiring trenches and formed thicker than the first wirings. Accordingly, the pattern precision of the bit lines and the wirings that have a different film thickness can be increased, and through holes that are formed between the bit lines in the self-alignment manner are formed shallow, and also resistances of the bit lines and the wirings are reduced.
    Type: Application
    Filed: January 9, 2001
    Publication date: February 7, 2002
    Applicant: Fujitsu Limited,
    Inventors: Kazuhiro Mizutani, Michiari Kawano
  • Patent number: 6326726
    Abstract: An organic electroluminescent display device having a transparent supporting substrate, a transparent anode of a plurality of stripes provided on the transparent supporting substrate, an organic electroluminescent layer extending over the transparent supporting substrate and the transparent anode, and a cathode of a plurality of stripes which extend in a direction perpendicular to a direction along which the stripes of the anode extend, wherein an insulative separation wall is provided between each of the striped anodes, and the insulative separation wall has a height which is higher than a sum of a thickness of the anode and a thickness of the organic electroluminescent layer, where the organic electroluminescent layer also extends over the insulative separation wall.
    Type: Grant
    Filed: February 23, 1998
    Date of Patent: December 4, 2001
    Assignee: NEC Corporation
    Inventors: Kazuhiro Mizutani, Shigeyoshi Ootsuki
  • Publication number: 20010036691
    Abstract: A method for manufacturing an organic EL display device is provided, capable of improving an opening ratio and providing narrower pitches for narrowing non-lighting portion between pixels, and, at the same time, capable of eliminating short-circuiting between display pixels for eliminating cross-talk and non-lighting pixels. In the deposition process of the cathode 6, the incident angle of the deposition material onto the substrate is optimized by optionally changing parameters such as a distance between the substrate 1 and the mask 11 and a distance between the substrate and the point deposition source 13. Thus, deposition material from a plurality of deposition sources impinges onto the substrate surface obliquely passing at a different incident angles though opening (slits 11a) of the mask 11, so that the width 10 of the electrode pattern 6 becomes broader than the width of the slit by superposition of the deposition material passing through the slits at different incident angles.
    Type: Application
    Filed: April 30, 2001
    Publication date: November 1, 2001
    Inventors: Eiichi Kitazume, Kazuhiro Mizutani
  • Publication number: 20010033127
    Abstract: A display panel module comprises: a substrate; a circuit board; electrode terminals aligned in a first direction over a surface of the substrate, each of the electrode terminals extending in a second direction perpendicular to the first direction; lead terminals aligned in the first direction over a confronting surface of the circuit board to the substrate; at least an anisotropically conductive film sandwiched between the electrode terminals and the lead terminals; and a plurality of first electrically insulating walls provided on the substrate and positioned in at least selected plural ones of gaps between selected ones of the electrode terminals, and the selected ones of the electrode terminals being positioned on opposite side regions of the module, and the opposite side regions are distanced in the first direction and separated by a center region, wherein the first electrically insulating walls have a first height, which is higher than a first total height of the electrode terminals and the anisotropical
    Type: Application
    Filed: April 23, 2001
    Publication date: October 25, 2001
    Applicant: NEC CORPORATION
    Inventors: Kazuhiro Mizutani, Eiichi Kitazume
  • Publication number: 20010017518
    Abstract: An organic electroluminescent display device comprising a transparent supporting substrate, a transparent anode of a plurality of stripes provided on the transparent supporting substrate, an organic electroluminescent layer extending over the transparent supporting substrate and the transparent anode, and a cathode of a plurality of stripes which extend in a direction perpendicular to a direction along which the stripes of the anode extend, wherein at least an insulative separation wall is provided between the stripes of the anode and the insulative separation wall has a height which is higher than a sum of a thickness of the anode and a thickness of the organic electroluminescent layer and further wherein the organic electroluminescent layer also extends over the insulative separation wall.
    Type: Application
    Filed: March 28, 2001
    Publication date: August 30, 2001
    Applicant: NEC Corporation
    Inventors: Kazuhiro Mizutani, Shigeyoshi Ootsuki
  • Patent number: 6004842
    Abstract: A semiconductor device comprises a semiconductor substrate; a transfer transistor including a gate electrode formed on the semiconductor substrate through a gate insulation film, and a first diffused layer formed in the semiconductor substrate on both sides of the gate electrode; an insulation film which covers an upper surface of the transfer transistor and in which a contact hole reaching the first diffused layer is opened; a capacitor formed on the insulation film and connected to the first diffused layer through the contact hole; a second diffused layer formed in the semiconductor substrate below the contact hole and being the same conduction type as the first diffused layer; and a third diffused layer formed in the semiconductor substrate below the contact hole, formed extending to a region which is deeper than the first and the second diffused layers, and having the same conduction type as the first diffused layer.
    Type: Grant
    Filed: March 26, 1998
    Date of Patent: December 21, 1999
    Assignee: Fujitsu Limited
    Inventors: Shinichiroh Ikemasu, Kazuhiro Mizutani
  • Patent number: 5570311
    Abstract: An SRAM semiconductor device having a parallel connection of two series circuits each having a driver transistor and a load connected in series, a wiring for connecting an interconnection point between the driver transistor and load of each of the two series circuits to a control terminal of the driver transistor of the other of the two series circuits, and a transfer transistor connected to each interconnection point, wherein the driver transistor and transfer transistor each are an insulating gate field effect transistor having a channel region formed on the surface of a semiconductor substrate at a predetermined area, source/drain regions on both sides of the channel region, and an insulated gate above the channel region, and the transfer transistor has a resistor region having an impurity concentration lower than the source/drain regions on both sides of the channel region of the driver transistor, the resistor region being contiguous to the channel region of the transfer transistor.
    Type: Grant
    Filed: January 31, 1994
    Date of Patent: October 29, 1996
    Assignee: Fujitsu Limited
    Inventors: Taiji Ema, Kazuo Itabashi, Kazuhiro Mizutani