Patents by Inventor Kazuhiro Saito

Kazuhiro Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10348913
    Abstract: A friction member that abuts against a rotating member being fixed to a display portion and that stops the rotating member being fixed to a display portion by frictional resistance of an abutting surface accommodates the rotating member into a predetermined accommodating position in a reliable manner by changing a frictional force of the friction member.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: July 9, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kazuhiro Saito
  • Publication number: 20190166323
    Abstract: In a solid state imaging device as an embodiment, an analog-to-digital converter unit converts, in a first period, a first pixel signal into a digital signal, performs, in a determination period after the first period, the comparison of a second pixel signal with the reference signal set to a predetermined threshold, and converts, in a second period after the determination period, the second pixel signal at a gain in accordance with a result of the comparison performed in the determination period into a digital signal. Until the reference signal reaches the threshold from the first period, the reference signal generation unit changes the reference signal without changing a direction of change of the reference signal with respect to the lapse of time.
    Type: Application
    Filed: November 21, 2018
    Publication date: May 30, 2019
    Inventors: Kazuhiro Saito, Tetsuya Itano
  • Patent number: 10203642
    Abstract: An image forming apparatus includes a development current detector that detects an actual measurement value of a development current, a development current calculator that calculates a provisional calculation value of a development current based on an image formation condition, and an image-defect determiner that determines whether or not an image defect occurs, based on the actual measurement value of the development current detected by the development current detector and the provisional calculation value of the development current calculated by the development current calculator.
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: February 12, 2019
    Assignee: KONICA MINOLTA, INC.
    Inventors: Hiroki Shibata, Wataru Watanabe, Keiki Katsumata, Natsuko Kawai, Kazuhiro Saito, Hiroshi Morimoto
  • Publication number: 20190037122
    Abstract: An image pickup device, an image pickup system, and a movable body that include a conductive line in which a potential changes in a direction opposite to a direction of a change in a potential of a control line used to perform a global electronic shutter operation.
    Type: Application
    Filed: July 23, 2018
    Publication date: January 31, 2019
    Inventors: Daisuke Kobayashi, Itsutaku Sano, Kazuhiro Saito
  • Patent number: 10194103
    Abstract: A solid-state imaging device includes pixels including a photoelectric converter, a holding portion, and a transfer unit transferring charges from the photoelectric converter to the holding portion, and outputting a signal based on charges held in the holding portion, a signal line the signal is output from the pixels, a clipping unit limiting signal level so that it falls within a range having an upper limit or a lower limit determined by a clipping level, a transfer control unit controlling the transfer unit so that the charges generated during one exposure period are transferred through transfer operation performed at frequency variable but at least once, and a clipping level control unit controlling so that the clipping level is set to first clipping level when the transfer operation is performed at first frequency, and is set to second clipping level when the transfer operation is performed at second frequency.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: January 29, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kazuhiro Saito, Daisuke Kobayashi, Toru Koizumi
  • Publication number: 20180316884
    Abstract: A photoelectric conversion device includes a pixel region in which pixels are arranged to form rows and columns, control lines each connected to the pixels on a corresponding row, output lines connected to the pixels on a corresponding column, a pixel control unit configured to supply control signals to control the pixels for the control lines, and a signal processing unit configured to select and output a signal output to the output lines. The pixel region includes readout regions each including a block of the pixels arranged on continuous rows and columns, and at least one row includes both of the pixel of the block forming a first readout region and the pixel of the block forming a second readout region. The pixel control unit and the signal processing unit are configured to read out signals of the pixels in a corresponding block sequentially for each of the readout regions.
    Type: Application
    Filed: April 17, 2018
    Publication date: November 1, 2018
    Inventors: Yukihiro Kuroda, Yoshikazu Yamazaki, Kazuhiro Saito
  • Publication number: 20180309950
    Abstract: A photoelectric conversion apparatus having a first substrate and a second substrate overlaid on each other and including electrically conductive portions is provided. The first substrate includes a photoelectric conversion element, a first portion configured to form part of a first surface, a second portion which is included in an electrically conductive pattern closest to the first portion, and a third portion which is included in an electrically conductive pattern second closest to the first portion. The second substrate includes a fourth portion configured to form part of a second surface, and a circuit. In a planar view with respect to the first surface, an area of the first portion is smaller than an area of the second portion and larger than an area of a portion of the third portion overlaying the second portion.
    Type: Application
    Filed: June 25, 2018
    Publication date: October 25, 2018
    Inventors: Takanori Yamashita, Kazuhiro Saito, Tatsuya Ryoki, Yoshikazu Yamazaki
  • Publication number: 20180278131
    Abstract: Provided is a rotor of a brushed motor capable of reducing the occurrence of contamination during press-fitting of a commutator onto a knurling and reducing defect factors due to rotor contamination to improve productivity. In a rotor of a brushed motor having a commutator press-fitted onto a knurling of a shaft, an inclined surface is provided on an inner circumferential side of the commutator, and an angle of the inclined surface is configured to be smaller than an angle of an axial end portion of the knurling. The knurling may be configured to be at a position different from a shaft stepped end surface of the shaft and the knurling may be configured to be positioned axially inward of the commutator from an end surface of the commutator.
    Type: Application
    Filed: July 29, 2016
    Publication date: September 27, 2018
    Inventors: Sachio KAWADA, Kouichi KUNIYASU, Kazuhiro SAITO
  • Patent number: 10057529
    Abstract: A device has stacked first and second substrates. The first substrate includes pixel array having pixels arranged along surface, the second substrate includes readout circuit having first AD-conversion circuit for generating first digital signals corresponding to first signals from the pixels, first parallel-serial conversion circuit for outputting first serial signal by performing parallel-serial conversion on the first digital signals, and processing circuit for processing the first serial signal. In orthogonal projection to the surface, part of the pixel array and part of the processing circuit overlap with each other. The first AD-conversion circuit is arranged between edge of the second substrate and the processing circuit. The first parallel-serial conversion circuit is arranged between the first AD-conversion circuit and the processing circuit.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: August 21, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuhiro Saito, Takanori Yamashita, Tatsuya Ryoki, Yoshikazu Yamazaki
  • Patent number: 10051223
    Abstract: A photoelectric conversion apparatus having a first substrate and a second substrate overlaid on each other and including electrically conductive portions is provided. The first substrate includes a photoelectric conversion element, a first portion configured to form part of a first surface, a second portion which is included in an electrically conductive pattern closest to the first portion, and a third portion which is included in an electrically conductive pattern second closest to the first portion. The second substrate includes a fourth portion configured to form part of a second surface, and a circuit. In a planar view with respect to the first surface, an area of the first portion is smaller than an area of the second portion and larger than an area of a portion of the third portion overlaying the second portion.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: August 14, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takanori Yamashita, Kazuhiro Saito, Tatsuya Ryoki, Yoshikazu Yamazaki
  • Patent number: 10018929
    Abstract: An image forming apparatus includes: a color toner supply unit configured to supply, to a recording medium, color toner for forming a toner image on the recording medium; a transparent toner supply unit configured to supply, to the recording medium, transparent toner having no releasability from a surface member bonded to a surface of the recording medium on which the toner image is formed; and a control unit configured to control the transparent toner supply unit to supply the transparent toner to cover the color toner supplied from the color toner supply unit to the recording medium.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: July 10, 2018
    Assignee: Konica Minolta, Inc.
    Inventors: Tomohiro Kawasaki, Hiroyuki Saito, Kazuhiro Saito, Kei Yuasa
  • Patent number: 9989885
    Abstract: An image forming apparatus includes: an image carrier; a developing unit which supplies a toner contained in a developer to the image carrier; a lubricant supply unit which supplies a lubricant to the image carrier; a lubricant amount detection unit which detects an amount of the lubricant which is supplied to the image carrier from the lubricant supply unit and is thereafter incorporated into the developing unit from the image carrier; and a control unit which controls the developing unit to discharge the lubricant from the developing unit according to the amount of the lubricant detected by the lubricant amount detection unit.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: June 5, 2018
    Assignee: KONICA MINOLTA, INC.
    Inventors: Kazuhiro Saito, Tomohiro Kawasaki, Hiroyuki Saito, Kei Yuasa
  • Publication number: 20180151526
    Abstract: A semiconductor wafer has an edge support ring around a perimeter of the semiconductor wafer and conductive layer formed over a surface of the semiconductor wafer within the edge support ring. A first stencil is disposed over the edge support ring with first openings aligned with the conductive layer. The first stencil includes a horizontal portion over the edge support ring, and a step-down portion extending the first openings to the conductive layer formed over the surface of the semiconductor wafer. The horizontal portion may have a notch with the edge support ring disposed within the notch. A plurality of bumps is dispersed over the first stencil to occupy the first openings over the conductive layer. A second stencil is disposed over the edge support ring with second openings aligned with the conductive layer to deposit a flux material in the second openings over the conductive layer.
    Type: Application
    Filed: January 15, 2018
    Publication date: May 31, 2018
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Michael J. SEDDON, Takashi NOMA, Kazuhiro SAITO
  • Patent number: 9986243
    Abstract: In the multi mode, the software processing unit notifies the hardware processing unit by batch of multiple settings information sets about multiple output pictures before the hardware processing unit starts to encode an input picture, and the hardware processing unit performs continuous encoding for the output pictures, based on the settings information sets notified of by the software processing unit, without a notification signifying a completion for every picture, and upon completion of encoding for all of the output pictures, sends an interrupt notification signifying a completion of encoding to the software processing unit.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: May 29, 2018
    Assignee: MegaChips Corporation
    Inventor: Kazuhiro Saito
  • Publication number: 20180115653
    Abstract: An image forming apparatus includes a plurality of image formers each capable of forming, on a sheet, an overlap image and a non-overlap image, a fixer that fixes, on the sheet, a whole image composed of the overlap images and the non-overlap images, and a hardware processor that controls each of the plurality of image formers such that a difference in image at a boundary between the overlap image and the non-overlap image is reduced in the whole image.
    Type: Application
    Filed: October 16, 2017
    Publication date: April 26, 2018
    Inventors: Natsuko MINEGISHI, Wataru WATANABE, Hiroshi MORIMOTO, Keiki KATSUMATA, Kazuhiro SAITO, Hiroki SHIBATA, Daiki WATANABE
  • Publication number: 20180107145
    Abstract: An image forming apparatus includes a development current detector that detects an actual measurement value of a development current, a development current calculator that calculates a provisional calculation value of a development current based on an image formation condition, and an image-defect determiner that determines whether or not an image defect occurs, based on the actual measurement value of the development current detected by the development current detector and the provisional calculation value of the development current calculated by the development current calculator.
    Type: Application
    Filed: October 4, 2017
    Publication date: April 19, 2018
    Applicant: Konica Minolta, Inc.
    Inventors: Hiroki SHIBATA, Wataru WATANABE, Keiki KATSUMATA, Natsuko KAWAI, Kazuhiro SAITO, Hiroshi MORIMOTO
  • Publication number: 20180102386
    Abstract: A solid-state imaging device includes pixels each of which includes a photoelectric converter configured to generate charges by photoelectric conversion, a holding unit configured to hold charges generated by the photoelectric converter, and a transfer unit configured to transfer charges from the photoelectric converter to the holding unit, and outputs a signal based on charges in the holding unit, a transfer control unit configured to control the transfer unit to transfer charges generated by the photoelectric converter during one exposure period to the holding unit by a variable number, which is one or greater, of transfer operations, an amplifier unit configured to amplify the signal, and a control unit configured to control a gain of the amplifier unit to be a first gain when the number of transfer operations is first number and to be a second gain when the number of transfer operations is a second number.
    Type: Application
    Filed: September 22, 2017
    Publication date: April 12, 2018
    Inventors: Daisuke Kobayashi, Toru Koizumi, Kazuhiro Saito
  • Publication number: 20180084206
    Abstract: A solid-state imaging device includes pixels including a photoelectric converter, a holding portion, and a transfer unit transferring charges from the photoelectric converter to the holding portion, and outputting a signal based on charges held in the holding portion, a signal line the signal is output from the pixels, a clipping unit limiting signal level so that it falls within a range having an upper limit or a lower limit determined by a clipping level, a transfer control unit controlling the transfer unit so that the charges generated during one exposure period are transferred through transfer operation performed at frequency variable but at least once, and a clipping level control unit controlling so that the clipping level is set to first clipping level when the transfer operation is performed at first frequency, and is set to second clipping level when the transfer operation is performed at second frequency.
    Type: Application
    Filed: August 10, 2017
    Publication date: March 22, 2018
    Inventors: Kazuhiro Saito, Daisuke Kobayashi, Toru Koizumi
  • Patent number: 9905525
    Abstract: A semiconductor wafer has an edge support ring around a perimeter of the semiconductor wafer and conductive layer formed over a surface of the semiconductor wafer within the edge support ring. A first stencil is disposed over the edge support ring with first openings aligned with the conductive layer. The first stencil includes a horizontal portion over the edge support ring, and a step-down portion extending the first openings to the conductive layer formed over the surface of the semiconductor wafer. The horizontal portion may have a notch with the edge support ring disposed within the notch. A plurality of bumps is dispersed over the first stencil to occupy the first openings over the conductive layer. A second stencil is disposed over the edge support ring with second openings aligned with the conductive layer to deposit a flux material in the second openings over the conductive layer.
    Type: Grant
    Filed: August 18, 2016
    Date of Patent: February 27, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Michael J. Seddon, Takashi Noma, Kazuhiro Saito
  • Publication number: 20180053739
    Abstract: A semiconductor wafer has an edge support ring around a perimeter of the semiconductor wafer and conductive layer formed over a surface of the semiconductor wafer within the edge support ring. A first stencil is disposed over the edge support ring with first openings aligned with the conductive layer. The first stencil includes a horizontal portion over the edge support ring, and a step-down portion extending the first openings to the conductive layer formed over the surface of the semiconductor wafer. The horizontal portion may have a notch with the edge support ring disposed within the notch. A plurality of bumps is dispersed over the first stencil to occupy the first openings over the conductive layer. A second stencil is disposed over the edge support ring with second openings aligned with the conductive layer to deposit a flux material in the second openings over the conductive layer.
    Type: Application
    Filed: August 18, 2016
    Publication date: February 22, 2018
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Michael J. SEDDON, Takashi NOMA, Kazuhiro SAITO