Patents by Inventor Kazuhisa Higuchi
Kazuhisa Higuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10199338Abstract: A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.Type: GrantFiled: May 12, 2016Date of Patent: February 5, 2019Assignee: Renesas Electronics CorporationInventors: Taku Kanaoka, Masashi Sahara, Yoshio Fukayama, Yutaro Ebata, Kazuhisa Higuchi, Koji Fujishima
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Publication number: 20160284652Abstract: A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.Type: ApplicationFiled: May 12, 2016Publication date: September 29, 2016Inventors: Taku KANAOKA, Masashi SAHARA, Yoshio FUKAYAMA, Yutaro EBATA, Kazuhisa HIGUCHI, Koji FUJISHIMA
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Patent number: 8941578Abstract: In conventional liquid crystal display controllers, the display is reduced in the stand-by state but the liquid crystal display duty is not changed, i.e., even the common electrodes of the rows that are not producing display are scanned, and the consumption of electric power is not decreased to a sufficient degree in the stand-by state. A liquid crystal display controller includes a drive duty selection register capable of being rewritten by a microprocessor, and a drive bias selection register. When the display is changed from the whole display on a liquid crystal display panel to a partial display on part of the rows only, the preset values of the drive duty selection register and of the drive bias selection register are changed, so that the display is selectively produced on a portion of the liquid crystal display panel at a low voltage with a low-duty drive.Type: GrantFiled: July 11, 2013Date of Patent: January 27, 2015Assignee: Renesas Electronics CorporationInventors: Yoshikazu Yokota, Kunihiko Tani, Gorou Sakamaki, Katsuhiko Yamamoto, Takashi Yoneoka, Kazuhisa Higuchi, Kimihiko Sugiyama
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Publication number: 20140159245Abstract: A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.Type: ApplicationFiled: February 12, 2014Publication date: June 12, 2014Applicants: Renesas Electronics Corporation, Hitachi Device Engineering Co., Ltd., Hitachi ULSI Systems Co., Ltd.Inventors: Taku KANAOKA, Masashi SAHARA, Yoshio FUKAYAMA, Yutaro EBATA, Kazuhisa HIGUCHI, Koji FUJISHIMA
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Patent number: 8669659Abstract: A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.Type: GrantFiled: April 24, 2012Date of Patent: March 11, 2014Assignees: Renesas Electronics Corporation, Hitachi ULSI Systems Co., Ltd.Inventors: Taku Kanaoka, Masashi Sahara, Yoshio Fukayama, Yutaro Ebata, Kazuhisa Higuchi, Koji Fujishima
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Publication number: 20130293796Abstract: In conventional liquid crystal display controllers, the display is reduced in the stand-by state but the liquid crystal display duty is not changed, i.e., even the common electrodes of the rows that are not producing display are scanned, and the consumption of electric power is not decreased to a sufficient degree in the stand-by state. A liquid crystal display controller includes a drive duty selection register capable of being rewritten by a microprocessor, and a drive bias selection register. When the display is changed from the whole display on a liquid crystal display panel to a partial display on part of the rows only, the preset values of the drive duty selection register and of the drive bias selection register are changed, so that the display is selectively produced on a portion of the liquid crystal display panel at a low voltage with a low-duty drive.Type: ApplicationFiled: July 11, 2013Publication date: November 7, 2013Inventors: Yoshikazu YOKOTA, Kunihiko TANI, Gorou SAKAMAKI, Katsuhiko YAMAMOTO, Takashi YONEOKA, Kazuhisa HIGUCHI, Kimihiko SUGIYAMA
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Patent number: 8547320Abstract: In conventional liquid crystal display controllers, the display is reduced in the stand-by state but the liquid crystal display duty is not changed, i.e., even the common electrodes of the rows that are not producing display are scanned, and the consumption of electric power is not decreased to a sufficient degree in the stand-by state. A liquid crystal display controller includes a drive duty selection register capable of being rewritten by a microprocessor, and a drive bias selection register. When the display is changed from the whole display on a liquid crystal display panel to a partial display on part of the rows only, the preset values of the drive duty selection register and of the drive bias selection register are changed, so that the display is selectively produced on a portion of the liquid crystal display panel at a low voltage with a low-duty drive.Type: GrantFiled: June 4, 2012Date of Patent: October 1, 2013Assignee: Renesas Electronics CorporationInventors: Yoshikazu Yokota, Kunihiko Tani, Gorou Sakamaki, Katsuhiko Yamamoto, Takashi Yoneoka, Kazuhisa Higuchi, Kimihiko Sugiyama
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Patent number: 8477124Abstract: A semiconductor device has an LCD driver formed over a silicon substrate. The LCD driver is arranged in a source output circuit region and includes two or more source output cells for generating data signals and two or more output pads for receiving the data signals and sending them to the outside. The two or more pads are arranged over the silicon substrate along a row direction, and the two or more source output cells are arranged in two rows and N columns along the row direction. A source output cell arranged at an Nth column of a first row is electrically coupled to a (2N?1)th output pad. Also, a source output cell CS1 arranged at the Nth column of a second row is electrically coupled to a (2N)th output pad. The arrangement allows for a reduced chip size.Type: GrantFiled: December 22, 2010Date of Patent: July 2, 2013Assignee: Renesas Electronics CorporationInventors: Taku Ishida, Kazuhisa Higuchi, Shinobu Notomi
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Patent number: 8324706Abstract: A semiconductor device which, in spite of the existence of a dummy active region, eliminates the need for a larger chip area and improves the surface flatness of the semiconductor substrate. In the process of manufacturing it, a thick gate insulating film for a high voltage MISFET is formed over an n-type buried layer as an active region and a resistance element IR of an internal circuit is formed over the gate insulating film. Since the thick gate insulating film lies between the n-type buried layer and the resistance element IR, the coupling capacitance produced between the substrate (n-type buried layer) and the resistance element IR is reduced.Type: GrantFiled: June 10, 2010Date of Patent: December 4, 2012Assignee: Renesas Electronics CorporationInventors: Keiichi Yoshizumi, Kazuhisa Higuchi, Takayuki Nakaji, Masami Koketsu, Hideki Yasuoka
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Patent number: 8294214Abstract: Signal lines which provide electric connections from an internal circuit formed on a main surface of a semiconductor chip and including, for example, MIS transistor to protective elements constituted by, for example, diodes are drawn out from outlet ports formed on wiring lines disposed between the protective elements, and a signal line region occupied by the signal lines is provided over the protective elements and under electrode pads. A wiring region on the main surface of the semiconductor chip can be enlarged without increasing the chip area.Type: GrantFiled: November 18, 2009Date of Patent: October 23, 2012Assignee: Renesas Electronics CorporationInventors: Shinya Suzuki, Kazuhisa Higuchi
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Publication number: 20120256816Abstract: In conventional liquid crystal display controllers, the display is reduced in the stand-by state but the liquid crystal display duty is not changed, i.e., even the common electrodes of the rows that are not producing display are scanned, and the consumption of electric power is not decreased to a sufficient degree in the stand-by state. A liquid crystal display controller includes a drive duty selection register capable of being rewritten by a microprocessor, and a drive bias selection register. When the display is changed from the whole display on a liquid crystal display panel to a partial display on part of the rows only, the preset values of the drive duty selection register and of the drive bias selection register are changed, so that the display is selectively produced on a portion of the liquid crystal display panel at a low voltage with a low-duty drive.Type: ApplicationFiled: June 4, 2012Publication date: October 11, 2012Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Yoshikazu YOKOTA, Kunihiko TANI, Gorou SAKAMAKI, Katsuhiko YAMAMOTO, Takashi YONEOKA, Kazuhisa HIGUCHI, Kimihiko SUGIYAMA
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Publication number: 20120205788Abstract: A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.Type: ApplicationFiled: April 24, 2012Publication date: August 16, 2012Inventors: TAKU KANAOKA, Masashi Sahara, Yoshio Fukayama, Yutaro Ebata, Kazuhisa Higuchi, Koji Fujishima
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Patent number: 8212763Abstract: In conventional liquid crystal display controllers such as for portable telephone sets, the display is reduced in the stand-by state but the liquid crystal display duty is not changed, i.e., even the common electrodes of the rows that are not producing display are scanned, and the consumption of electric power is not decreased to a sufficient degree in the stand-by state. A liquid crystal display controller (2) includes a drive duty selection register (34) capable of being rewritten by a microprocessor (1), and a drive bias selection register (32). When the display is changed from the whole display on a liquid crystal display panel (3) to a partial display on part of the rows only, the preset values of the drive duty selection register and of the drive bias selection register are changed, so that the display is selectively produced on a portion of the liquid crystal display panel at a low voltage with a low-duty drive.Type: GrantFiled: February 22, 2010Date of Patent: July 3, 2012Assignee: Renesas Electronics CorporationInventors: Yoshikazu Yokota, Kunihiko Tani, Gorou Sakamaki, Katsuhiko Yamamoto, Takashi Yoneoka, Kazuhisa Higuchi, Kimihiko Sugiyama
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Patent number: 8183691Abstract: A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.Type: GrantFiled: June 17, 2010Date of Patent: May 22, 2012Assignees: Renesas Electronics Corporation, Hitachi ULSI System Co., Ltd.Inventors: Taku Kanaoka, Masashi Sahara, Yoshio Fukayama, Yutaro Ebata, Kazuhisa Higuchi, Koji Fujishima
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Patent number: 8009259Abstract: A liquid crystal display device includes a liquid crystal display panel and a semiconductor integrated circuit for driving and controlling the liquid crystal display panel. The number of input/output wires connected to I/O terminals (bonding pads) of the semiconductor integrated circuit is reduced so as to simplify wiring patterns of the I/O wires, whereby degrees of freedom in arranging the I/O wiring patterns are enhanced. The panel has a pair of insulating substrate, and the semiconductor integrated circuit is mounted on one of the paired substrates. The semiconductor integrated circuit has a mode terminal which is fixed to a power supply potential or to a reference potential during operation of the integrated circuit, and power supply dummy terminals connected to the power supply potential or reference potential inside the semiconductor integrated circuit. The wiring patterns formed on the paired insulating substrates connect the mode terminal to the power supply dummy terminals.Type: GrantFiled: December 13, 2010Date of Patent: August 30, 2011Assignee: Renesas Electronics CorporationInventors: Kazuhisa Higuchi, Yoshikazu Yokota, Kimihiko Sugiyama
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Publication number: 20110148827Abstract: A semiconductor device has an LCD driver formed over a silicon substrate. The LCD driver is arranged in a source output circuit region and includes two or more source output cells for generating data signals and two or more output pads for receiving the data signals and sending them to the outside. The two or more pads are arranged over the silicon substrate along a row direction, and the two or more source output cells are arranged in two rows and N columns along the row direction. A source output cell arranged at an Nth column of a first row is electrically coupled to a (2N?1)th output pad. Also, a source output cell CS1 arranged at the Nth column of a second row is electrically coupled to a (2N)th output pad. The arrangement allows for a reduced chip size.Type: ApplicationFiled: December 22, 2010Publication date: June 23, 2011Inventors: Taku ISHIDA, Kazuhisa Higuchi, Shinobu Notomi
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Publication number: 20110080550Abstract: A liquid crystal display device includes a liquid crystal display panel and a semiconductor integrated circuit for driving and controlling the liquid crystal display panel. The number of input/output wires connected to I/O terminals (bonding pads) of the semiconductor integrated circuit is reduced so as to simplify wiring patterns of the I/O wires, whereby degrees of freedom in arranging the I/O wiring patterns are enhanced. The panel has a pair of insulating substrate, and the semiconductor integrated circuit is mounted on one of the paired substrates. The semiconductor integrated circuit has a mode terminal which is fixed to a power supply potential or to a reference potential during operation of the integrated circuit, and power supply dummy terminals connected to the power supply potential or reference potential inside the semiconductor integrated circuit. The wiring patterns formed on the paired insulating substrates connect the mode terminal to the power supply dummy terminals.Type: ApplicationFiled: December 13, 2010Publication date: April 7, 2011Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Kazuhisa Higuchi, Yoshikazu Yokota, Kimihiko Sugiyama
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Patent number: 7876414Abstract: A liquid crystal display device comprises a liquid crystal display panel and a semiconductor integrated circuit for driving and controlling the liquid crystal display panel. The number of input/output wires connected to I/O terminals (bonding pads) of the semiconductor integrated circuit is reduced so as to simplify wiring patterns of the I/O wires, whereby degrees of freedom in arranging the I/O wiring patterns are enhanced. The panel has a pair of insulating substrate, and the semiconductor integrated circuit is mounted on one of the paired substrates. The semiconductor integrated circuit has a mode terminal which is fixed to a power supply potential or to a reference potential during operation of the integrated circuit, and power supply dummy terminals connected to the power supply potential or reference potential inside the semiconductor integrated circuit. The wiring patterns formed on the paired insulating substrates connect the mode terminal to the power supply dummy terminals.Type: GrantFiled: July 6, 2010Date of Patent: January 25, 2011Assignee: Renesas Electronics CorporationInventors: Kazuhisa Higuchi, Yoshikazu Yokota, Kimihiko Sugiyama
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Publication number: 20100273386Abstract: A liquid crystal display device comprises a liquid crystal display panel and a semiconductor integrated circuit for driving and controlling the liquid crystal display panel. The number of input/output wires connected to I/O terminals (bonding pads) of the semiconductor integrated circuit is reduced so as to simplify wiring patterns of the I/O wires, whereby degrees of freedom in arranging the I/O wiring patterns are enhanced. The panel has a pair of insulating substrate, and the semiconductor integrated circuit is mounted on one of the paired substrates. The semiconductor integrated circuit has a mode terminal which is fixed to a power supply potential or to a reference potential during operation of the integrated circuit, and power supply dummy terminals connected to the power supply potential or reference potential inside the semiconductor integrated circuit. The wiring patterns formed on the paired insulating substrates connect the mode terminal to the power supply dummy terminals.Type: ApplicationFiled: July 6, 2010Publication date: October 28, 2010Applicant: RENESAS TECHNOLOGY CORP.Inventors: Kazuhisa Higuchi, Yoshikazu Yokota, Kimihiko Sugiyama
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Publication number: 20100252924Abstract: A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.Type: ApplicationFiled: June 17, 2010Publication date: October 7, 2010Inventors: TAKU KANAOKA, Masashi Sahara, Yoshio Fukayama, Yutaro Ebata, Kazuhisa Higuchi, Koji Fujishima