Patents by Inventor Kazuhisa Ishiguro
Kazuhisa Ishiguro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8284876Abstract: There are provided an A/D converting circuit (10) for converting, into a digital signal, a broadband intermediate frequency signal which is output from a frequency converting circuit (5), and a DSP (11) for generating and outputting control data to control gains of an antenna damping circuit (3) and an LNA (4) based on a level of the broadband digital intermediate frequency signal which is output from the A/D converting circuit (10), and the broadband intermediate frequency signal which is output from the frequency converting circuit (5) is A/D converted and supplied to the DSP (11). Consequently, it is possible to reduce a frequency of a signal input to the A/D converting circuit (10). Thus, it is also possible to reduce a consumed current without requiring the use a special AD converter corresponding to a radio frequency input.Type: GrantFiled: November 29, 2006Date of Patent: October 9, 2012Assignee: Ricoh Co., Ltd.Inventor: Kazuhisa Ishiguro
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Patent number: 7991371Abstract: An arbitrary threshold value (Ei0) is established which defines a boundary as to activating an RF-AGC circuit (21) if the value of the field intensity (Ei) of a received signal is greater than what value while the value of the field intensity of a signal at a desired frequency being a predetermined value (Ei0) in a weak field area. The established value (Ei0) is used to provide a threshold value establishing/controlling part (22) that controls the ON/OFF of the operation of the RF-AGC circuit (21). In this way, a set maker or the like of an IC including an automatic gain control part (11) can perform a field test or the like such that a preferable value obtained by a result of the field test or the like can be used as an AGC start level (Ei0), whereby an optimum AGC control can be performed based on the preferable AGC start level (Ei0).Type: GrantFiled: October 26, 2007Date of Patent: August 2, 2011Assignee: Ricoh Co., Ltd.Inventor: Kazuhisa Ishiguro
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Patent number: 7868695Abstract: A differential amplifier circuit at the input stage is configured with a twin differential type having a first differential amplifier circuit (11) and a second differential amplifier circuit (12), respective outputs of which are received by a first and a second source-grounded amplifier (M5, M10). The second source-grounded amplifier (M10) is connected to a current mirror circuit (M11, M12), which is driven by the drain current of the second source-grounded amplifier (M10). With this configuration, the dynamic range for the upper half portion of an alternating signal output from an output terminal (OUT) is determined by the current supply capability of the first source-grounded amplifier (M5) and the dynamic range for the lower half portion is determined by the current supply capability of the second source-grounded amplifier (M10). This eliminates the need of a constant current circuit of a large current for generating a signal having lower half portion in which the waveform distortion is improved.Type: GrantFiled: August 2, 2006Date of Patent: January 11, 2011Assignee: Ricoh Co., Ltd.Inventors: Kazuhisa Ishiguro, Yoshiaki Takahashi
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Patent number: 7852967Abstract: This invention includes a gain control section 13 capable of changing an APC loop gain according to a power output level set in a power amplifier to allow suppression of variation in power output level when the power output level is low and suppression of occurrence of ringing when the power output level is high by making the loop gain high when the power output level is low and making the loop gain low when the power output level is high.Type: GrantFiled: January 3, 2007Date of Patent: December 14, 2010Assignee: Ricoh Co., Ltd.Inventor: Kazuhisa Ishiguro
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Patent number: 7848721Abstract: An antenna damping circuit in which the frequency characteristics of damping amount can be made substantially flat by providing a resistor (Ra) between PIN diodes (D1, D2) having a resistance varying upon application of a control voltage (Vc) and a capacitive dummy antenna circuit (10), and setting its resistance high enough to neglect the capacity of the dummy antenna circuit (10) sufficiently when the dummy antenna circuit (10) is viewed from the side of the PIN diodes (D1, D2) thereby substantially eliminating the influence of capacity of the dummy antenna circuit (10).Type: GrantFiled: November 7, 2005Date of Patent: December 7, 2010Assignee: Ricoh Co., Ltd.Inventor: Kazuhisa Ishiguro
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Patent number: 7843258Abstract: A plurality of low-pass filters (2-1, 2-2, 2-3) are cascaded to the post stage of an OTA (1) and a plurality of high-pass notch filters (3-1, 3-2, 3-3) are cascaded further to the post-stage thereof so that a high-pass filter having a Q is not connected to the output of the OTA (1) having a high output impedance and a capacitor having a low capacitance is not connected with the output of th OTA (1) thus preventing multifeedback and avoiding such problems as the zero point of the notch filter (BEF) deviates from a design value or oscillation takes place.Type: GrantFiled: February 8, 2006Date of Patent: November 30, 2010Assignee: Ricoh Co., Ltd.Inventor: Kazuhisa Ishiguro
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Patent number: 7812685Abstract: A second operational amplifier (7) is arranged, as an interface circuit (6), between a first operational amplifier (5) outputting the control voltage (Vcd) of a dummy filter (2) and a main filter (1), and the reference voltage (Vr) of the second operational amplifier (7) is optimized such that the control voltage (Vcd) obtained by using the dummy filter (2) is converted through the interface circuit (6) into a control voltage (Vcm) most suitable for the main filter (1), thereby obtaining a control voltage (Vcm) most suitable for regulating the frequency characteristics of the main filter (1) to desired characteristics.Type: GrantFiled: July 12, 2006Date of Patent: October 12, 2010Assignee: Ricoh Co., Ltd.Inventor: Kazuhisa Ishiguro
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Patent number: 7795979Abstract: By connecting an antenna damping circuit (4) and a bypass switch (5) in series and connecting the series circuit and an LNA (3) in parallel, it is possible to inhibit a generation of a signal path for connecting the bypass switch (5) to the LNA (3) in series in an operation of the LNA (3) and to prevent a noise factor of the LNA (3) from being deteriorated due to an on resistance of the bypass switch (5).Type: GrantFiled: November 29, 2006Date of Patent: September 14, 2010Assignee: Ricoh Co., Ltd.Inventor: Kazuhisa Ishiguro
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Publication number: 20100117724Abstract: A plurality of low-pass filters (2-1, 2-2, 2-3) are cascaded to the post-stage of an OTA (1) and a plurality of high-pass notch filters (3-1, 3-2, 3-3) are cascaded further to the post-stage thereof so that a high-pass filter having a high Q is not connected to the output of the OTA (1) having a high output impedance and a capacitor having a low capacitance is not connected with the output of the OTA (1) thus preventing multifeedback and avoiding such problems as the zero point of the notch filter (BEF) deviates from a design value or oscillation takes place.Type: ApplicationFiled: February 8, 2006Publication date: May 13, 2010Applicants: Niigata Seimitsu Co., Ltd, Ricoh Co., LtdInventor: Kazuhisa Ishiguro
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Publication number: 20100001797Abstract: A differential amplifier circuit at the input stage is configured with a twin differential type having a first differential amplifier circuit (11) and a second differential amplifier circuit (12), respective outputs of which are received by a first and a second source-grounded amplifier (M5, M10). The second source-grounded amplifier (M10) is connected to a current mirror circuit (M11, M12), which is driven by the drain current of the second source-grounded amplifier (M10). With this configuration, the dynamic range for the upper half portion of an alternating signal output from an output terminal (OUT) is determined by the current supply capability of the first source-grounded amplifier (M5) and the dynamic range for the lower half portion is determined by the current supply capability of the second source-grounded amplifier (M10). This eliminates the need of a constant current circuit of a large current for generating a signal having lower half portion in which the waveform distortion is improved.Type: ApplicationFiled: August 2, 2006Publication date: January 7, 2010Applicants: NIIGATA SEIMITSU CO., LTD., RICOH CO., LTD.Inventors: Kazuhisa Ishiguro, Yoshiaki Takahashi
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Patent number: 7639085Abstract: A first MOS transistor (M1) and a second MOS transistor (M2) constitute a cascode amplifier. The second MOS transistor (M2) is in a differential connection with a gain control MOS transistor (M4), which has its gate supplied with an AGC control voltage (VAGC), and it is arranged that the device area ratio of the second MOS transistor (M2) to the gain control MOS transistor (M4) is one to N (where N?1). In this way, even in a region where the AGC control voltage (VAGC) is small, abrupt variations of the gain can be suppressed, while the drain current of the first MOS transistor (M1) can be kept constant independently of the gain control.Type: GrantFiled: December 19, 2005Date of Patent: December 29, 2009Assignee: Ricoh Co., Ltd.Inventor: Kazuhisa Ishiguro
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Publication number: 20090310723Abstract: Circuits (an AGC amplifier 8 and a second A/D converting circuit 9) for detecting an antenna level of a disturbing wave are provided on an output of a frequency converting circuit 4, and levels of antenna ends of a desirable wave and the disturbing wave are calculated by a DSP 10 and a gain of an antenna damping circuit 2, an LNA 3 or the frequency converting circuit 4 is adjusted corresponding to the respective levels, thereby enabling an optimum gain distribution for an RF stage to be set corresponding to the levels of the desirable wave and the disturbing wave.Type: ApplicationFiled: February 6, 2007Publication date: December 17, 2009Inventor: Kazuhisa Ishiguro
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Publication number: 20090261905Abstract: An operational amplifier comprises: a differential amplifier circuit (11) that performs a differential amplification operation based on the difference of signals received at two input terminals (IN1, IN2); and a source-grounded amplifier (M5) connected to an output of the differential amplifier circuit (11). In the operational amplifier, there are provided a bias resistor (Rb) connected to the gate of the source-grounded amplifier (M5) and a bias circuit (M20) connected to the bias resistor (Rb). The gate bias of the source-grounded amplifier (M5) is supplied from the bias circuit (M20) through the bias resistor (Rb) so that the input resistance of the source-grounded amplifier (M5) is determined by the bias resistor (Rb) and the input resistance of the source-grounded amplifier (M5) can be reduced.Type: ApplicationFiled: July 12, 2006Publication date: October 22, 2009Applicants: NIIGATA SEIMITSU CO., LTD., RICOH CO., LTD.Inventor: Kazuhisa Ishiguro
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Patent number: 7602248Abstract: An idling current setting circuit (3) includes: current setting transistors (Q3, Q4) connected to output transistors (Q1, Q2) in a driver (2) in current mirror form; a plurality of current setting resistors (R1 to R4); and a plurality of switches (ASW1 to ASW4) for switching to any of the current setting resistors (R1 to R4). This enables the idling current to be set by the current mirror ratio between the current setting transistors (Q3, Q4) having no connection with the open gain of the power amplifier and the output transistors (Q1, Q2), so that the idling current can be arbitrarily set independently of the open gain.Type: GrantFiled: July 12, 2006Date of Patent: October 13, 2009Assignees: Niigata Seimitsu Co., Ltd., Ricoh Co., Ltd.Inventor: Kazuhisa Ishiguro
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Publication number: 20090207952Abstract: There are provided an A/D converting circuit (10) for converting, into a digital signal, a broadband intermediate frequency signal which is output from a frequency converting circuit (5), and a DSP (11) for generating and outputting control data to control gains of an antenna damping circuit (3) and an LNA (4) based on a level of the broadband digital intermediate frequency signal which is output from the A/D converting circuit (10), and the broadband intermediate frequency signal which is output from the frequency converting circuit (5) is A/D converted and supplied to the DSP (11). Consequently, it is possible to reduce a frequency of a signal input to the A/D converting circuit (10). Thus, it is also possible to reduce a consumed current without requiring the use a special AD converter corresponding to a radio frequency input.Type: ApplicationFiled: November 29, 2006Publication date: August 20, 2009Applicants: Niigata Seimitsu Co., Ltd., Ricoh Co., Ltd.Inventor: Kazuhisa Ishiguro
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Publication number: 20090176471Abstract: A first FE circuit (1) including a first mixer (1a) and a second FE circuit (2) including a second mixer (2a) are provided, and either the first FE circuit (1) or the second FE circuit (2) is selectively used corresponding to a level of a disturbing wave contained in a received radio frequency signal. Thus, it is possible to increase a receiving sensitivity by using the first mixer (1a) having a great mutual conductance when the level of the disturbing wave is lower than a predetermined threshold (an improvement in the receiving sensitivity is more important than that in a disturbing characteristic) and to enhance the disturbing characteristic by using the second mixer (2a) having a small mutual conductance when the level of the disturbing wave is equal to or higher than the predetermined threshold (the improvement in the disturbing characteristic is more important than that in the receiving sensitivity).Type: ApplicationFiled: January 8, 2009Publication date: July 9, 2009Inventor: Kazuhisa ISHIGURO
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Publication number: 20090128259Abstract: A second operational amplifier (7) is arranged, as an interface circuit (6), between a first operational amplifier (5) outputting the control voltage (Vcd) of a dummy filter (2) and a main filter (1), and the reference voltage (Vr) of the second operational amplifier (7) is optimized such that the control voltage (Vcd) obtained by using the dummy filter (2) is converted through the interface circuit (6) into a control voltage (Vcm) most suitable for the main filter (1), thereby obtaining a control voltage (Vcm) most suitable for regulating the frequency characteristics of the main filter (1) to desired characteristics.Type: ApplicationFiled: July 12, 2006Publication date: May 21, 2009Applicants: Niigata Seimitsu Co., Ltd., Ricoh Co., Ltd.Inventor: Kazuhisa Ishiguro
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Publication number: 20090124225Abstract: In a tuning circuit constituted by connecting a coil L and two capacitors C1 and C2 into a ? type, a total capacitance value obtained by adding respective capacitance values of an input capacitance Cin and the first capacitor C1 which are connected to one of terminals of a coil L is set to be equal to a capacitance value of the second capacitor C2 connected to the other terminal of the coil L (C2=Cin+C1). Consequently, a capacitance value on one terminal side of the coil L and a capacitance value on the other terminal side are set to be equal to each other and are thus balanced, and a level difference between two output signals on a parallel resonance point of the ? type tuning circuit is reduced even if the capacitance values of the two capacitors C1 and C2 are decreased.Type: ApplicationFiled: November 7, 2008Publication date: May 14, 2009Inventors: Kazuhisa Ishiguro, Yoshiaki Takahashi
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Publication number: 20090124227Abstract: A first signal path including a first LNA 3 and a second signal path including an antenna damping circuit 4 and a second LNA 5 are connected in parallel, and switching into either the first signal path or the second signal path is carried out to control a gain of a received signal. When a level of the received signal is higher than a first threshold, it is once attenuated by the antenna damping circuit 4 and is then amplified by a necessary quantity through the second LNA 5. Thus, the gain of the received signal is controlled in a total of the attenuation and the amplification. Consequently, a level of a signal to be input to the second LNA 5 is reduced to cause a distortion of the signal in the amplification with difficulty.Type: ApplicationFiled: November 7, 2008Publication date: May 14, 2009Inventor: Kazuhisa ISHIGURO
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Publication number: 20090124228Abstract: There are provided a notch filter 21 for carrying out a filtering processing for inputting a broadband IF signal which is output from a frequency converting circuit 4 and attenuating a frequency component of a desirable wave and an amplifier 22 for amplifying and outputting a signal output from the notch filter 21, and a presence/absence of an intermodulation disturbance is detected depending on whether a signal having an equal frequency to the frequency of the desirable wave is output from the amplifier 22 or not though the frequency of the desirable wave is attenuated by the notch filter 21. Consequently, it is possible to easily detect the intermodulation disturbance irrespective of a level of a received signal or a desirable wave included therein without carrying out a complicated processing such as an amplitude modulation of the received signal.Type: ApplicationFiled: October 31, 2008Publication date: May 14, 2009Applicant: Niigata Seimitsu Co., Ltd.Inventor: Kazuhisa Ishiguro