Patents by Inventor Kazuma SHIOMI

Kazuma SHIOMI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Parallel interface and integrated circuit
    Patent number: 9614525
    Abstract: A parallel interface is disclosed. The parallel interface of the present disclosure includes an input unit configured to input, in parallel, a plurality of predetermined data signals and a clock signal; an output unit configured to output, in parallel, the predetermined data signals in synchronization with the clock signal; and a plurality of transmission lines disposed between the input unit and the output unit and configured to transmit, in parallel, the predetermined data signals and the clock signal, wherein the transmission lines are configured with a wiring pattern in which the transmission lines have different electrical lengths and an equal electrical capacitance.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: April 4, 2017
    Assignee: Rohm Co., Ltd.
    Inventors: Kazuma Shiomi, Takateru Yamamoto
  • Clock signal generating circuit
    Patent number: 9479113
    Abstract: A clock signal generating circuit includes: an oscillator having a trimming function of arbitrarily adjusting an oscillation frequency of a first clock signal generated by the oscillator depending on trimming data; and a trimming data modulation part configured to dynamically change a reference trimming data for adjusting the oscillation frequency of the first clock signal to generate modulation trimming data, and output the modulation trimming data, as the trimming data, to the oscillator.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: October 25, 2016
    Assignee: Rohm Co., Ltd.
    Inventors: Takateru Yamamoto, Kazuma Shiomi
  • CLOCK SIGNAL GENERATING CIRCUIT
    Publication number: 20160103466
    Abstract: A clock signal generating circuit includes: an oscillator having a trimming function of arbitrarily adjusting an oscillation frequency of a first clock signal generated by the oscillator depending on trimming data; and a trimming data modulation part configured to dynamically change a reference trimming data for adjusting the oscillation frequency of the first clock signal to generate modulation trimming data, and output the modulation trimming data, as the trimming data, to the oscillator.
    Type: Application
    Filed: October 7, 2015
    Publication date: April 14, 2016
    Inventors: Takateru Yamamoto, Kazuma Shiomi
  • PARALLEL INTERFACE AND INTEGRATED CIRCUIT
    Publication number: 20160028408
    Abstract: A parallel interface is disclosed. The parallel interface of the present disclosure includes an input unit configured to input, in parallel, a plurality of predetermined data signals and a clock signal; an output unit configured to output, in parallel, the predetermined data signals in synchronization with the clock signal; and a plurality of transmission lines disposed between the input unit and the output unit and configured to transmit, in parallel, the predetermined data signals and the clock signal, wherein the transmission lines are configured with a wiring pattern in which the transmission lines have different electrical lengths and an equal electrical capacitance.
    Type: Application
    Filed: July 22, 2015
    Publication date: January 28, 2016
    Inventors: Kazuma SHIOMI, Takateru YAMAMOTO