Abstract: A degassing apparatus capable of preventing cross-contamination is provided. A degassing apparatus 1 includes degassing modules 10, 20, and 30 each having a tube unit 12 that is a gas permeable membrane separating a fluid circulation space S1 and a reduced-pressure space S2 from each other, vacuum piping 40 communicatively connected to the reduced-pressure spaces S2, a discharge device 50 that discharges gas in the reduced-pressure spaces S2 through the vacuum piping 40, atmospheric release piping 60 communicatively connected to the reduced-pressure spaces S2, an atmospheric release valve 70 capable of introducing atmosphere into the reduced-pressure spaces S2 through the atmospheric release piping 60, and a control unit 80 that controls the operation of the discharge device 50 and the atmospheric release valve 70.

Abstract: The invention provides an aeration apparatus for injecting air into a target substance to aerate the target substance. The aeration apparatus is capable of keeping the air jet nozzle from contacting the target substance when the apparatus is stopped, so as to prevent clogging of the air jet nozzle.

Abstract: Provided is an aeration apparatus, which is enabled, when stopped, to prevent an air injection nozzle from being choked, by keeping the air injection nozzle out of contact with an object to be treated. An aeration apparatus (1) is dipped in the object and blows air to aerate the object.

Abstract: A screen device suited to use in a projection type display device for a high-definition television set. The screen device includes a screen on which television images are projected, and a screen frame to which this screen is attached at the central section thereof. Incorporated into this screen frame are speakers which are used as the front speakers of a sound reproduction system of the type which is commonly known as the 3-1 type 4-channel system.

Abstract: In a two-picture television receiver, a field polarity detection circuit detects field polarity of an image signal of a main picture. A first and a second field memories are capable of writing-in an image signal to constitute a sub-picture for respective fields, and read-out circuit alternately reads-out from the first and the second field memories in response to a polarity detection signal of the field polarity detection circuit. A write-in field determining circuit determines into which of the first or the second field memories (2), (3), the image signal for the sub-picture is to be written. This writing is based on the polarity detection signal of the field polarity detection circuit, a vertical synchronization signal in image signal of sub-picture, and a binary signal which changes alternately for respective one field based on the vertical synchronization signal.

Abstract: A television receiver display system for displaying, within a main image produced from a first video signal, one or more secondary images produced from a second video signal. Successive frames or fields of picture data of the second video signal are stored in an image memory, and successive lines of that data are read out to be alternately written into a pair of line memories, and subsequently alternately read out from the line memories in synchronism with the horizontal sync periods of the first video signal and at a higher data transfer rate than the write-in rate, to be then combined with video data of the first video signal and applied to a display.

Abstract: In the refreshing of the memory contents of the non-volatile memory device, a refreshing buffer memory is provided for temporarily storing a data signal of an address to be refreshed. Not only this data signal is stored in the refreshing buffer memory, but also the address of this data signal and the status of the refreshing processes, that is, up to which step of the refreshing routine the refreshing operation has proceeds, is stored in this refreshing buffer memory. Then, even when the power supply is shut off during the course of the refreshing action, at the next chance of the resumption of the power supply, the refreshing routine can correctly be started from the step at which the refreshing routine was previously terminated, thereby the refreshing operation can always be completed correctly.

Abstract: A circuit for detecting the presence or absence of a television receiving signal is disclosed, wherein a detection output for automatic frequency control is compared with first to fifth levels. A low-level output is produced when the detection output is lower than the fifth level; an intermediate-level output is produced when the detection output is between the fifth and fourth levels; a low-level output is produced when the detection output is between the third and second levels; an intermediate-level output is produced when the detection output is between the second and first levels; and a high-level output is produced when the detection output is higher than the first level, thus producing an output signal of three-digit level from a single output terminal.

Abstract: A signal generator for producing a pulse width modulated signal for highly reliable remote controlling. Binary signals (2.sup.0 to 2.sup.3) are coupled into respective input terminals of a shift register (8) having a predetermined number of flip-flop stages (FF 21-FF 24), producing a serial output pulse train having a specified number of pulses comprising broader pulses and narrower pulses. The output pulse train from the output terminal (Q24) of the last stage (FF 24) is coupled to an output pulse generating circuit (11) for pulse width modulation, and an inverted output from the other output terminal (Q24) is coupled into the first stage input terminal (D21) of the shift register (8), thereby producing a pulse train consisting of a combination of a first part and a second part, the second part having an opposite relation between its broader pulses and narrower pulses to that of the first part.

Abstract: A D-A converter for converting a digital signal to a duty factor of a pulse train signal and for averaging the pulse signal by a low-pass filter to convert it to an analog signal is disclosed. A plurality of pulses which are to be selected in accordance with the input digital signal comprise a plurality of basic pulses of different phases and pulse widths derived by frequency division and auxiliary basic pulses which occur at a cycle period which is at least twice as long as a repetition cycle period of the basic pulses. The basic pulses are selected by high order bits of the digital signal while the auxiliary basic pulses are selected by low order bits of the digital signal to produce an output pulse train signal a duty factor of which changes in accordance with the digital signal. The pulse train signal is then averaged to convert it to an analog signal.

Abstract: A channel selection apparatus comprises a counter, a decoder, a clock pulse generator, and a control circuit for controlling them, and selects a channel by switching a channel selection voltage by selecting a potentiometer. The counter includes a cascade-connected flip-flop such that a trailing edge of an AND output of an output of a flip-flop in one stage and a channel selection count input signal triggers a flip-flop in the following stage. The decoder includes a plurality of output transistors and a plurality of parallel-connected transistor sets with common collectors of each of the transistor sets being connected to a base of a corresponding output transistor and input signals being applied to bases of each of the transistor sets.

Abstract: A channel selection apparatus having a tuner including a voltage-dependent reactance element such as a varactor diode, to which one of a plurality of channel selection voltages having different magnitudes for each of the channels is applied to select a desired channel. A plurality of channel selection voltages for selecting a plurality of channels are digitalized and previously stored in a memory block at addresses corresponding to the channels. During the channel selection operation, the digital voltage signal for the channel desired to be selected is read out of the memory block and D-A converted to produce an analog channel selection voltage, which is then applied to the tuner to select the desired channel. The memory block further stores bits to indicate whether the channels are to be selected or not to be selected but skipped to select the next channel, at each of the addresses corresponding to the channels. Thus, only the required channels can be sequentially selected.

Abstract: In a channel selector of the type having an electronic tuner in which the channel selection voltage, which is different for each channel, is applied across a voltage-variable reactance element such as a varactor diode in order to select and receive the desired channel, each channel selection voltage is converted into the digital signal, and is stored in a memory block, and in selecting the desired channel, the corresponding digital signal is read out of the memory block and is converted into the analog channel-selection signal to be applied to the tuner. A completely electronic channel selection becomes possible because any mechanical parts such as variable resistors for storing the channel selection voltages may be eliminated.

Abstract: A station selector comprising a first memory for memorizing the first decimal digit of a given channel number in a form of a corresponding binary signal, a second memory for memorizing the second decimal place digit of the channel number in a form of corresponding binary signal, first and second binary-to-decimal converters for converting the contents of the first and second memories into corresponding decimal signals, a matrix circuit for combining the decimal outputs of both the first and second binary-to-decimal converters such that the resultant combination can be taken out from one of the intersections of a matrix corresponding to a given two-digit decimal channel number, and a preset voltage circuit having a plurality of preset channel selection voltage elements adapted to provide respective preset channel selection voltages and selecting one of the voltages for selecting a channel of a corresponding channel number in response to the output taken out from the afore-said intersection, the selected voltag