Abstract: In an operation method of a multi-shaft combined cycle plant, a low-load mode in which an output of the multi-shaft combined cycle plant is adjusted by adjustment of only an output of a gas turbine and a high-load mode in which the output of the multi-shaft combined cycle plant is adjustable by adjustment of the output of the gas turbine and adjustment of an output of a steam turbine are switched according to a demanded load. In the low-load mode, steam at a standby flow rate at which the steam turbine is capable of maintaining a predetermined initial load is supplied to the steam turbine, and the initial load is applied to the steam turbine.

Abstract: A storage device includes a disk including a plurality of tracks, each track including a plurality of addressable blocks of data, a buffer memory, and a controller that stores in the buffer memory, in response to a command to read a first value of a first key, the first value, and also a second value of a second key upon determining that the second value is entirely readable after the first value is read, from the same track as the first value.

Abstract: In an operation method of a multi-shaft combined cycle plant, a low-load mode in which an output of the multi-shaft combined cycle plant is adjusted by adjustment of only an output of a gas turbine and a high-load mode in which the output of the multi-shaft combined cycle plant is adjustable by adjustment of the output of the gas turbine and adjustment of an output of a steam turbine are switched according to a demanded load. In the low-load mode, steam at a standby flow rate at which the steam turbine is capable of maintaining a predetermined initial load is supplied to the steam turbine, and the initial load is applied to the steam turbine.

Abstract: A power saving of a serial interface circuit decreases the unnecessary power consumption of a serial interface circuit, while decreasing the return time and expanding the power saving range. Gates are disposed for stopping the clock supply to a digital portion of the interface circuit while maintaining operation of clock sources in the digital portions. Therefore a quick shift to and return from the power save mode by stopping and restarting clocks is implemented, which further decreases power consumption.

Abstract: A power saving of a serial interface circuit decreases the unnecessary power consumption of a serial interface circuit, while decreasing the return time and expanding the power saving range. Gates are disposed for stopping the clock supply to a digital portion of the interface circuit while maintaining operation of clock sources in the digital portions. Therefore a quick shift to and return from the power save mode by stopping and restarting clocks is implemented, which further decreases power consumption.

Abstract: In a digital temperature compensated crystal oscillator, ADC circuit and DAC circuit are combined into a data conversion circuit which comprises a first section for DA conversion, a second section for converting an analog temperature voltage signal into a digital form in cooperation with the first section, and a third section for supplementing the DA conversion of the first section and thereby generating an analog control voltage for a VCO from a digital temperature compensation data. There is further provided a switch circuit for connecting the output of the first section to either of the second and third section.

Abstract: A digital control system such as a digital temperature compensated crystal oscillator (DTCXO) system is arranged to offer superior oscillating performance with reduced size and cost. For example, to reduce the memory capacity, a memory 31 receives upper 6 bits of temperature data, and a decoder 32 calculates temperature compensation data from lower 4 bits and output data from the memory (FIGS. 1-11). For a one-chip configuration and low power consumption, a MOS type Colpitts oscillator (FIG. 16) is provided with a circuit for adjusting the source resistance of the MOS. For size reduction and fine frequency adjustment, a DTCXO is provided with sections such as an adder 341, an up-down counter 342 and an auxiliary frequency control section (AFC) 332 (FIGS. 20, 21, 24 and 25). An adding section 415 is provided between a D/A converting section 414 and a capacitance varying section 416 to obtain superior linearity with respect to a control voltage and quality of offset.