Abstract: A MEMS sensor includes a through hole to allow communication with an external environment, such as to send or receive acoustic signals or to be exposed to the ambient environment. In addition to the information that is being measured, light energy may also enter the environment of the sensor via the through hole, causing short-term or long-term effects on measurements or system components. A light mitigating structure is formed on or attached to a lid of the MEMS die to absorb or selectively reflect the received light in a manner that limits effects on the measurements or interest and system components.

Abstract: A MEMS sensor includes a through hole to allow communication with an external environment, such as to send or receive acoustic signals or to be exposed to the ambient environment. In addition to the information that is being measured, light energy may also enter the environment of the sensor via the through hole, causing short-term or long-term effects on measurements or system components. A light mitigating structure is formed on or attached to a lid of the MEMS die to absorb or selectively reflect the received light in a manner that limits effects on the measurements or interest and system components.

Abstract: A microelectromechanical system (MEMS) sensor package includes a laminate that provides physical support and electrical connection to a MEMS sensor. A resin layer is embedded within an opening of the laminate and a MEMS support layer is embedded within the opening by the resin layer. A MEMS structure of the MEMS sensor is located on the upper surface of the MEMS support layer.

Abstract: A microelectromechanical system (MEMS) sensor package includes a laminate that provides physical support and electrical connection to a MEMS sensor. A resin layer is embedded within an opening of the laminate and a MEMS support layer is embedded within the opening by the resin layer. A MEMS structure of the MEMS sensor is located on the upper surface of the MEMS support layer.

Abstract: A MEMS sensor includes a through hole to allow communication with an external environment, such as to send or receive acoustic signals or to be exposed to the ambient environment. In addition to the information that is being measured, light energy may also enter the environment of the sensor via the through hole, causing short-term or long-term effects on measurements or system components. A light mitigating structure is formed on or attached to a lid of the MEMS die to absorb or selectively reflect the received light in a manner that limits effects on the measurements or interest and system components.

Abstract: A system and method for the manufacture of flipchip microelectromechanical system devices. A method comprises forming a cavity from a first surface of a rigid back through to a second surface of the rigid back, depositing an anisotropic conductive film over the first surface of the multilayer rigid back to conform to a contour of a microelectromechanical system device, positioning the a microelectromechanical system device over the cavity formed in the multilayered rigid back, and causing contact of the microelectromechanical system device with the anisotropic conductive film deposited over the first surface of the multilayer rigid back.

Abstract: A system and method for the manufacture of flipchip microelectromechanical system devices. A method comprises forming a cavity from a first surface of a rigid back through to a second surface of the rigid back, depositing an anisotropic conductive film over the first surface of the multilayer rigid back to conform to a contour of a microelectromechanical system device, positioning the a microelectromechanical system device over the cavity formed in the multilayered rigid back, and causing contact of the microelectromechanical system device with the anisotropic conductive film deposited over the first surface of the multilayer rigid back.

Abstract: A packaged integrated circuit (IC) includes a substrate including a first substrate pad disposed on a first side of the substrate, an IC die disposed on the first side of the substrate, and a first insulating layer molded over the IC die and the substrate. The IC die includes a first die pad on a side of the die opposite from a side of the die adjacent to the first side of the substrate. The first insulating layer includes a first channel extending through the first insulating layer to the first substrate pad, a second channel extending through the first insulating layer to the first die pad, conductive paste filling the first channel and in contact with the first substrate pad, and conductive paste filling the second channel and in contact with the die pad.

Abstract: A packaged integrated circuit (IC) includes a substrate including a first substrate pad disposed on a first side of the substrate, an IC die disposed on the first side of the substrate, and a first insulating layer molded over the IC die and the substrate. The IC die includes a first die pad on a side of the die opposite from a side of the die adjacent to the first side of the substrate. The first insulating layer includes a first channel extending through the first insulating layer to the first substrate pad, a second channel extending through the first insulating layer to the first die pad, conductive paste filling the first channel and in contact with the first substrate pad, and conductive paste filling the second channel and in contact with the die pad.

Abstract: A semiconductor package assembly includes a substrate having an upper surface with a die attachment region thereon. A layer of die attachment material is positioned on top of the die attachment region. The semiconductor package assembly also includes an integrated circuit (“IC”) die. The die has a top portion including a laterally extending top wall surface and a plurality of generally vertically extending wall surfaces extending downwardly from the top wall surface. The die has a metallized bottom portion. The bottom portion has at least two metallized laterally extending wall surfaces and a plurality of metallized generally vertically extending connecting surfaces that connect the metallized laterally extending surfaces of the bottom portion. The layer of die attachment material interfaces with one or both of the metallized laterally extending surfaces and the plurality of metallized generally vertically extending connecting wall surfaces.

Abstract: A method of assembling semiconductor devices includes connecting a bond wire between a bond pad on a top side surface of a semiconductor die having its bottom side surface attached to a package substrate and a bonded area within a metal terminal of the package substrate, where a bond is formed along a bonding interface between the bond wire and bonded area. After the connecting, a metal paste is applied including a plurality of metal particles and a binder over the bonded area. The metal paste is sintered to densify the plurality of metal particles to form reinforcement material including within a portion of the bonding interface for providing improved wirebond performance, such as increased pull strength.

Abstract: A method of assembling semiconductor devices includes applying a metal paste including a plurality of metal particles having an average size less than 50 nanometers and a binder material onto a metal terminal of a package substrate. The metal paste is processed including a heat up step in a reducing gas atmosphere and then a vacuum sintering step at a temperature of at least 200° C. for forming a sintered metal coating. A semiconductor die is attached onto a die attach area of the package substrate. A bond wire is then connected between a bond pad on the semiconductor die and the sintered metal coating on the metal terminal.

Abstract: In fabricating a semiconductor device first layers are formed of sintered bondable and solderable metal on a carrier strip. The first layers are patterned into first pads and second pads. A set of first pads is surrounding each second pad. The first pads are spaced from the second pad by gaps. The patterned layers are formed of agglomerate metal vertically on the first layers of sintered bondable and solderable metal of the first pads and of the second pad. The second layers are formed of sintered bondable and solderable metal vertically on the layers of agglomerate metal of the first pads.

Abstract: A method of assembling semiconductor devices includes dispensing a metal paste including metal particles in a solvent onto a bonding area of a plurality of metal terminals of a leadframe. The dispensing provides a varying thickness over the bonding area. The solvent is evaporated to form a sloped metal coating including a first sloped top face and a second sloped top face. The first sloped top face is closer to the die pad compared to the second sloped top face, the second sloped top face increases in coating thickness with decreasing distance to the die pad, and the first sloped top face decreases in coating thickness with decreasing distance to the die pad. A bottom side of semiconductor die including a plurality of top side bond pads is attached to the die pad. Bond wires are connected between the bond pads and the second sloped top faces.

Abstract: In fabricating a semiconductor device first layers are formed of sintered bondable and solderable metal on a carrier strip. The first layers are patterned into first pads and second pads. A set of first pads is surrounding each second pad. The first pads are spaced from the second pad by gaps. The patterned layers are formed of agglomerate metal vertically on the first layers of sintered bondable and solderable metal of the first pads and of the second pad.

Abstract: A plastic package (100) in which a semiconductor chip (101) is adhesively (102) attached to a metal stripe (110a) having an agglomerate structure, and electrically connected to bondable and solderable metal stripes (120) having particulate structures; metal stripes (120) are touching metal stripes (110b) of agglomerate structure to form vertical stacks (150); coats of solder (140) are welded to the agglomerate metal stripes (100a and 110b).

Abstract: A plastic package (100) in which a semiconductor chip (101) is adhesively (102) attached to a metal stripe (110a) having an agglomerate structure, and electrically connected to bondable and solderable metal stripes (120) having particulate structures; metal stripes (120) are touching metal stripes (110b) of agglomerate structure to form vertical stacks (150); coats of solder (140) are welded to the agglomerate metal stripes (100a and 110b).

Abstract: The objective of this invention is to present a semiconductor device manufacturing method with which the formation of voids inside an underfill resin can be prevented using a simple configuration.