Patents by Inventor Kazunori Matsuyama

Kazunori Matsuyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11972718
    Abstract: A display device displays an image in which each frame is formed by at least two subframes. The display device includes a drive unit configured to drive a plurality of pixels in a pixel array so as to drive pixels in at least two rows based on pixel data of each row of each supplied subframe data. The drive unit drives the plurality of pixels so as to cause pixels in a row not matching a row in the supplied current subframe data to emit light with a first condition, and cause pixels in a row matching the row in the current subframe data to emit light with a second condition. The second condition is a condition in which a light emission amount is larger than in the first condition when causing the pixels to emit light in accordance with identical pixel values.
    Type: Grant
    Filed: March 16, 2023
    Date of Patent: April 30, 2024
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazunori Matsuyama, Noriyuki Shikina
  • Publication number: 20240111146
    Abstract: A photoelectric conversion device is provided. The device includes a pixel array in which pixels are arranged, a drive controller configured to drive the pixel array, a horizontal transfer unit configured to sequentially output analog signals respectively output from columns of the pixel array, an AD converter configured to convert an analog signal output from the horizontal transfer unit into a digital signal, a first clock generator configured to generate a clock signal used to control an operation of the drive controller, and a second clock generator configured to generate a clock signal used to control the horizontal transfer unit and the AD converter. A clock tree in which a clock signal is distributed from the first clock generator and a clock tree in which a clock signal is distributed from the second clock generator form clock trees different from each other.
    Type: Application
    Filed: December 14, 2023
    Publication date: April 4, 2024
    Inventors: KAZUNORI MATSUYAMA, NORIYUKI SHIKINA
  • Publication number: 20240066718
    Abstract: A gripping mechanism includes a pair of gripping parts including a first gripping part and a second gripping part facing each other. Each of the first gripping part and the second gripping part includes a first end, a second end opposite to the first end, a projection provided at the first end, and a rotation shaft provided at the second end. The projection is rotatable about the rotation shaft. The first gripping part and the second gripping part face each other in a direction intersecting a direction in which the rotation shafts extend.
    Type: Application
    Filed: October 25, 2023
    Publication date: February 29, 2024
    Inventors: Takuma YABUTA, Kazunori KOUNO, Yoshinari MATSUYAMA
  • Publication number: 20230395629
    Abstract: An imaging device includes pixels each of which includes a microlens and a plurality of photoelectric conversion units. The pixels include a first pixel and a second pixel adjacent to the first pixel, a first photoelectric conversion unit included in the first pixel and a second photoelectric conversion unit included in the second pixel are configured to share a first floating diffusion unit, sensitivity of the second photoelectric conversion unit is lower than sensitivity of the first photoelectric conversion unit in a wavelength range in which the first photoelectric conversion unit has a peak of the sensitivity, and a charge of a photoelectric conversion unit other than the first photoelectric conversion unit and the second photoelectric conversion unit is read from a floating diffusion unit different from the first floating diffusion unit in each of the first pixel and the second pixel.
    Type: Application
    Filed: May 22, 2023
    Publication date: December 7, 2023
    Inventors: KAZUNORI MATSUYAMA, NORIYUKI SHIKINA
  • Publication number: 20230298506
    Abstract: A display device displays an image in which each frame is formed by at least two subframes. The display device includes a drive unit configured to drive a plurality of pixels in a pixel array so as to drive pixels in at least two rows based on pixel data of each row of each supplied subframe data. The drive unit drives the plurality of pixels so as to cause pixels in a row not matching a row in the supplied current subframe data to emit light with a first condition, and cause pixels in a row matching the row in the current subframe data to emit light with a second condition. The second condition is a condition in which a light emission amount is larger than in the first condition when causing the pixels to emit light in accordance with identical pixel values.
    Type: Application
    Filed: March 16, 2023
    Publication date: September 21, 2023
    Inventors: KAZUNORI MATSUYAMA, NORIYUKI SHIKINA
  • Patent number: 11210763
    Abstract: An image processing apparatus of the technique of this disclosure includes processing units, storage units, a control unit, dividing units which divide image data, and combining units which combine image data. The control unit specifies processing for which image data is divided according to a status of use of the storage units. The control unit causes one of the image processing units to process one of parts of image data divided based on a dividing position, combines the processed part of image data with the other part of image data, causes the other of the image processing units to process the other of parts of image data, the other of parts of image data being not processed by the one of the image processing units, and combines the processed part of image data with the one part of image data.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: December 28, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Kazunori Matsuyama
  • Publication number: 20210049732
    Abstract: An image processing apparatus of the technique of this disclosure includes processing units, storage units, a control unit, dividing units which divide image data, and combining units which combine image data. The control unit specifies processing for which image data is divided according to a status of use of the storage units. The control unit causes one of the image processing units to process one of parts of image data divided based on a dividing position, combines the processed part of image data with the other part of image data, causes the other of the image processing units to process the other of parts of image data, the other of parts of image data being not processed by the one of the image processing units, and combines the processed part of image data with the one part of image data.
    Type: Application
    Filed: August 11, 2020
    Publication date: February 18, 2021
    Inventor: Kazunori Matsuyama
  • Patent number: 9627005
    Abstract: In a video processing apparatus, an input processing unit inputs a video frame, a first video processing unit performs image processing on the input video frame, and an output processing unit outputs the image processed video frame to display it. Further, a control unit in the video processing apparatus controls the image processing so that a video frame subjected to freeze display in response to an input of a pause instruction to the video processing apparatus is displayed in the high image quality.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: April 18, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kazunori Matsuyama
  • Patent number: 9591258
    Abstract: To enable a high-quality image process while reducing power consumption, an image processing apparatus is characterized by acquiring a plurality of image frames constituting a moving image; detecting a feature quantity of the image frame; determining the number of image frames to be used for the image process of the image frame, based on the detected feature quantity; and performing the image process to a process-object frame, by using the image frames corresponding to the determined number of image frames.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: March 7, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kazunori Matsuyama
  • Publication number: 20150181159
    Abstract: To enable a high-quality image process while reducing power consumption, an image processing apparatus is characterized by acquiring a plurality of image frames constituting a moving image; detecting a feature quantity of the image frame; determining the number of image frames to be used for the image process of the image frame, based on the detected feature quantity; and performing the image process to a process-object frame, by using the image frames corresponding to the determined number of image frames.
    Type: Application
    Filed: December 15, 2014
    Publication date: June 25, 2015
    Inventor: Kazunori Matsuyama
  • Publication number: 20150110472
    Abstract: In a video processing apparatus, an input processing unit inputs a video frame, a first video processing unit performs image processing on the input video frame, and an output processing unit outputs the image processed video frame to display it. Further, a control unit in the video processing apparatus controls the image processing so that a video frame subjected to freeze display in response to an input of a pause instruction to the video processing apparatus is displayed in the high image quality.
    Type: Application
    Filed: October 15, 2014
    Publication date: April 23, 2015
    Inventor: Kazunori Matsuyama
  • Patent number: 5383189
    Abstract: The present invention provides a method and circuit for demultiplexing digital signals which generates no errors even when destuffing jitters are heavy. A buffer memory performs digital smoothing of the jitters which are periodically generated in lower order signals demultiplexed from higher order signals by a demultiplexing circuit. An analog IC performs resmoothing of the lower order signals which have been smoothed by the buffer memory, and thereafter performs digital/analog conversion thereof and outputs the lower order signals which have no jitters, through a transformer.
    Type: Grant
    Filed: March 13, 1992
    Date of Patent: January 17, 1995
    Assignee: NEC Corporation
    Inventors: Kazunori Matsuyama, Naoto Iga