Patents by Inventor Kazunori Morimoto

Kazunori Morimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130146866
    Abstract: A circuit board (1) includes a plurality of transistor elements on an insulating substrate (2). At least one of the plurality of transistor elements is an oxide TFT (10) including, as a channel layer (11), an oxide semiconductor. At least one of the plurality of transistor elements is an a-SiTFT (20) (i) being different from the oxide TFT (10) in functions as circuit components and (ii) including, as a channel layer (21), an amorphous silicon semiconductor. The oxide TFT (10) is a top gate transistor, and the a-SiTFT (20) is a bottom gate transistor. This provides: a configuration that can (a) enhance the performance of the circuit board equipped with the TFTs differing in their respective functions as circuit components and (b) reduce the area necessary for mounting the TFTs; and a method for producing the circuit board.
    Type: Application
    Filed: March 2, 2011
    Publication date: June 13, 2013
    Inventors: Hideki Kitagawa, Shinya Tanaka, Hajime Imai, Atsuhito Murai, Mitsunori Imade, Tetsuo Kikuchi, Kazunori Morimoto, Junya Shimada, Jun Nishimura
  • Patent number: 8427170
    Abstract: A drive circuit array substrate allowing for tests without mounting any driver ICs and without using expensive panel contact jigs and production and test methods thereof are provided. A data voltage application circuit, data selection circuit, gate selection circuit, and anode driver connected to a display pixel forming zone are formed on a drive circuit array substrate. The data voltage application circuit, data selection circuit, gate selection circuit, and anode driver allows for lighting test and aging test of the light emitting elements in the display pixel forming zone and measurement of transistor characteristics without mounting any driver ICs and without using expensive panel contract jigs.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: April 23, 2013
    Assignee: Casio Computer Co., Ltd.
    Inventors: Kazunori Morimoto, Tsuyoshi Ozaki
  • Publication number: 20130092927
    Abstract: The circuit board (1) of the present invention includes a plurality of transistor elements provided on a single insulating substrate (2) for respective pixels that are two-dimensionally arranged or respective pixels in a group of a predetermined number of the pixels. At least one of the plurality of transistor elements is an oxide TFT (10) having a channel layer (11) formed by an oxide semiconductor, and at least another of the plurality of transistor elements is an a-Si TFT (20) having a channel layer (21) formed by, for example, an amorphous silicon semiconductor. Each of the oxide TFT (10) and the a-Si TFT (20) is a bottom-gate transistor.
    Type: Application
    Filed: January 17, 2011
    Publication date: April 18, 2013
    Inventors: Atsuhito Murai, Shinya Tanaka, Hideki Kitagawa, Hajime Imai, Mitsunori Imade, Tetsuo Kikuchi, Kazunori Morimoto, Junya Shimada, Jun Nishimura
  • Patent number: 8411212
    Abstract: A touch electrode and a detection element are positioned in at least two of pixels. The touch electrode is formed in a first substrate, and is positioned so as to face a counter electrode. The touch electrode contacts the counter electrode and is electrically connected thereto when a second substrate is pressed and bent toward the first substrate. The detection element is connected to the touch electrode, and detects the electrical connection between the touch electrode and the counter electrode.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: April 2, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Dai Chiba, Takehiko Sakai, Tetsuo Fujita, Kazunori Morimoto, Yoshiharu Kataoka, Shogo Nishiwaki
  • Publication number: 20120250033
    Abstract: An optical sensor circuit in accordance with the present invention detects, based on a change in the amount of light received when a pointer (P) is placed in a coordinate detection area (2) through which light from a light source (3) passes, coordinates of a position of the pointer (3) in the coordinate detection area (2).
    Type: Application
    Filed: November 5, 2010
    Publication date: October 4, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Hideki Kitagawa, Takuya Watanabe, Hajime Imai, Yukihiko Nishiyama, Atsuhito Murai, Kazunori Morimoto
  • Publication number: 20120241768
    Abstract: An optical sensor circuit (20) includes a transistor (20c) and a transistor (20d). The transistor (20c) is connected in series with the transistor (20d). The transistor (20d) is configured to receive light. A black matrix is provided so as to face the transistor (20c). A voltage generated at a connecting point (i.e., node (netB)) of the transistor (20d) and the transistor (20c) varies depending on intensity of light received via the transistor (20d).
    Type: Application
    Filed: June 25, 2010
    Publication date: September 27, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Atsuhito Murai, Kazunori Morimoto, Yukihiko Nishiyama, Hajime Imai, Hideki Kitagawa
  • Patent number: 8139007
    Abstract: A light-emitting device comprises a power supply line, at least one data line, at least one pixel having a light-emitting element with one end electrically connected to the power supply line and another end set to a prescribed potential, and a first transistor connecting the data line(s) and one end of the light-emitting element, a current supplying circuit that outputs a verification current of a preset value, and a data driver unit having voltage measuring circuits that acquire a voltage of the one end of the light-emitting element as the verification voltage when the verification current flows via a current path of the data line and the first transistor of the pixel, from the one end of the light-emitting element to the other end from the current supplying circuit via the power supply line.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: March 20, 2012
    Assignee: Casio Computer Co., Ltd.
    Inventors: Yasushi Mizutani, Kazunori Morimoto, Tsuyoshi Ozaki
  • Publication number: 20120062451
    Abstract: The present invention provides a liquid crystal display device that allows suppressing loss of display quality caused by additional capacitance. The present invention provides a liquid crystal display device provided with a first substrate and a second substrate disposed opposing each other, and a liquid crystal layer sandwiched between the first substrate and the second substrate, wherein the first substrate has a gate bus line, a source bus line, a pixel electrode to which an image signal is inputted, and a common electrode to which a common signal is inputted, the pixel electrode and the common electrode are comb-shaped within a pixel, an electric field parallel to the surface of the first substrate is generated between the pixel electrode and the common electrode within the pixel, and the common electrode is arranged, within a display area, at a layer that is different from a layer at which the gate bus line is formed and from a layer at which the source bus line is formed.
    Type: Application
    Filed: April 20, 2010
    Publication date: March 15, 2012
    Inventors: Katsuhiko Morishita, Tsuyoshi Okazaki, Takenhiko Sakai, Dai Chiba, Tetsuo Fujita, Kazunori Morimoto
  • Publication number: 20120050246
    Abstract: The present invention provides a liquid crystal display device which can suppress generation of a locally luminous part where a dark line disappears.
    Type: Application
    Filed: February 18, 2010
    Publication date: March 1, 2012
    Inventors: Kazunori Morimoto, Takehiko Sakai, Tetsuo Fujita, Dai Chiba, Katsuhiko Morishita, Tsuyoshi Okazaki
  • Publication number: 20120006672
    Abstract: The present invention provides a novel method for separating hexafluoropropylene oxide (HFPO) from hexafluoropropylene (HFP), which is capable of reducing the burden on the environment. A mixture including HFPO and HFP is subjected to an extractive distillation operation using, as a solvent, at least one of a fluorine-containing saturated compound represented by the general formula CnHaFb (wherein n, a and b are integers which satisfy: n=3 to 8, 0?a?2n+1, and 1?b?2n+2) thereby separating into a first fraction including HFPO and a second fraction including HFP and the solvent. At least one of 1-bromopropane and 2-bromopropane may be u as the solvent in place of the fluorine-containing saturated compound.
    Type: Application
    Filed: February 18, 2010
    Publication date: January 12, 2012
    Inventors: Hideki Nakaya, Kazuyoshi Ichihara, Yasuhide Senba, Mikio Nakagoshi, Kazunori Morimoto
  • Publication number: 20110175836
    Abstract: A liquid crystal display device includes an active matrix substrate (20a) including a plurality of first touch panel interconnects (19b) extending in parallel with each other, a counter substrate (30a) facing the active matrix substrate (20a) and including a plurality of second touch panel interconnects (25a) extending in parallel with each other in a direction intersecting the first touch panel interconnects (19b), a liquid crystal layer (40) provided between the active matrix substrate (20a) and the counter substrate (30a) with an alignment film (9a, 9b) being interposed between the liquid crystal layer (40) and each of the active matrix substrate (20a) and the counter substrate (30a), and a plurality of columnar touch pins (P) connected to the first or second touch panel interconnects (19b, 25a). Repellency to the alignment films (9a, 9b) is imparted to at least a portion of a top portion of each of the touch pins (P).
    Type: Application
    Filed: June 17, 2009
    Publication date: July 21, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Takehiko Sakai, Dai Chiba, Yoshiharu Kataoka, Takuya Watanabe, Shogo Nishiwaki, Kazunori Morimoto
  • Publication number: 20110141413
    Abstract: A liquid crystal display panel (50a) including: an active matrix substrate (20a) including a plurality of light-reflecting lines (11), an insulating film (16) provided so as to cover the lines (11), and a plurality of pixel electrodes (19) provided in a matrix pattern on the insulating film (16); a counter substrate (30a) placed opposing the active matrix substrate (20a) and including a plurality of colored layers (22) provided in a matrix pattern so as to respectively overlap the pixel electrodes (19), and a black matrix (21a) provided between the colored layers (22); and a liquid crystal layer (40) provided between the active matrix substrate (20a) and the counter substrate (30a), wherein at least one of the black matrix (21a) and the lines (11) has a raised/recessed portion (C) whose surface is formed in a raised/recessed shape.
    Type: Application
    Filed: June 22, 2009
    Publication date: June 16, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Takehiko Sakai, Dai Chiba, Yoshiharu Kataoka, Tetsuo Fujita, Kazunori Morimoto
  • Publication number: 20110122361
    Abstract: The present invention provides a substrate for a display device and a liquid crystal display device, which are capable of preventing a reflective layer from being damaged in a resist separation step for patterning the reflective layer. The present invention is a substrate for a display device provided with a reflective layer in a display region, comprising: a pattern film that is disposed outside the display region except a terminal region and on the same side as a side of the reflective layer, the pattern film including either one of a material that has the same ionizability as a material of the reflective layer and a material that has higher ionizability than the material of the reflective layer.
    Type: Application
    Filed: April 14, 2009
    Publication date: May 26, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Tetsuo Fujita, Takehiko Sakai, Dai Chiba, Kazunori Morimoto, Yoshiharu Kataoka
  • Publication number: 20110102359
    Abstract: A touch electrode and a detection element are positioned in at least two of pixels. The touch electrode is formed in a first substrate, and is positioned so as to face a counter electrode. The touch electrode contacts the counter electrode and is electrically connected thereto when a second substrate is pressed and bent toward the first substrate. The detection element is connected to the touch electrode, and detects the electrical connection between the touch electrode and the counter electrode.
    Type: Application
    Filed: May 29, 2009
    Publication date: May 5, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Dai Chiba, Takehiko Sakai, Tetsuo Fujita, Kazunori Morimoto, Yoshiharu Kataoka, Shogo Nishiwaki
  • Patent number: 7887877
    Abstract: At a first timing, an ink jetting unit of a printer head coats an aqueous ink or an organic solvent ink on pixel forming regions on a panel substrate. At a second timing, a first infrared light source unit or a second infrared light source unit disposed adjacently to the ink jetting unit radiates infrared light to the aqueous ink or the organic solvent ink coated on the pixel forming regions to heat the ink and vaporize and dry the solvent in the aqueous ink or the organic solvent ink to fix a hole transporting material or an electron transporting material on the panel substrate.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: February 15, 2011
    Assignee: Casio Computer Co., Ltd.
    Inventors: Kazunori Morimoto, Tomoyuki Shirasaki
  • Patent number: 7881344
    Abstract: A vehicular network communication apparatus and method detects and wakes up a sleeping network node through transmission of a pseudo-wakeup signal after an initial wake up fails for one or more nodes in a network.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: February 1, 2011
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Atsuya Suzuki, Kazunori Morimoto
  • Publication number: 20100225770
    Abstract: A drive circuit array substrate allowing for tests without mounting any driver ICs and without using expensive panel contact jigs and production and test methods thereof are provided. A data voltage application circuit, data selection circuit, gate selection circuit, and anode driver connected to a display pixel forming zone are formed on a drive circuit array substrate. The data voltage application circuit, data selection circuit, gate selection circuit, and anode driver allows for lighting test and aging test of the light emitting elements in the display pixel forming zone and measurement of transistor characteristics without mounting any driver ICs and without using expensive panel contract jigs.
    Type: Application
    Filed: March 4, 2010
    Publication date: September 9, 2010
    Applicant: Casio Computer Co., Ltd.
    Inventors: Kazunori MORIMOTO, Tsuyoshi Ozaki
  • Publication number: 20090244047
    Abstract: A light-emitting device comprises a power supply line, at least one data line, at least one pixel having a light-emitting element with one end electrically connected to the power supply line and another end set to a prescribed potential, and a first transistor connecting the data line(s) and one end of the light-emitting element, a current supplying circuit that outputs a verification current of a preset value, and a data driver unit having voltage measuring circuits that acquire a voltage of the one end of the light-emitting element as the verification voltage when the verification current flows via a current path of the data line and the first transistor of the pixel, from the one end of the light-emitting element to the other end from the current supplying circuit via the power supply line.
    Type: Application
    Filed: March 30, 2009
    Publication date: October 1, 2009
    Applicant: Casio Computer Co., Ltd.
    Inventors: Yasushi MIZUTANI, Kazunori MORIMOTO, Tsuyoshi OZAKI
  • Patent number: 7384585
    Abstract: A novel process for producing a dry preform for a composite material takes advantage of the fact that a reinforcing filament assembly, when consisting of a fiber reinforcement layer a, formed by stringing a first set of parallel strands of fiber reinforcement over a part or all of the plane within any desired shape along the straight axis 2, and a fiber reinforcement layer b, formed by stringing a second set of parallel strands of fiber reinforcement over the plane at an angle ? with respect to the straight axis 2, such that 0°<?<180°, the part of the reinforcing filament assembly that consists solely of the fiber reinforcement b can be deformed as desired. According to this process, strands c of fiber reinforcement are strung using a fiber reinforcement string jig as shown in FIGS. 8(A) and 8(B). The layers of the strung strands of fiber reinforcement are brought together by a simple means such as stitching.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: June 10, 2008
    Assignee: Shikibo Ltd.
    Inventors: Masayasu Ishibashi, Koichi Hashimoto, Hideki Sakonjo, Akira Iriguchi, Kazunori Morimoto, Takeshi Tanamura, Tetsuro Hirokawa
  • Patent number: D585164
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: January 20, 2009
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Kazuhiro Kosukegawa, Kazunori Morimoto, Yosuke Tanaka, Maki Yamauchi