Patents by Inventor Kazunori Nishizono
Kazunori Nishizono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9578699Abstract: Provided is a control circuit capable of suppressing flickering of an LED while preventing degradation of the power efficiency. A control circuit is configured to control electric power to an LED illumination based on a rectified drive voltage, the rectified drive voltage being a drive signal rectified by a rectifier, the drive signal being an AC signal whose phase is controlled by a dimmer including a switching device. The control circuit includes a time period detection part configured to detect a time period in which a voltage value of the rectified drive voltage is less than or equal to a predetermined value; and a dimmer current control part configured so that a control current to the dimmer is greater than or equal to a holding current of the switching device during the time period detected.Type: GrantFiled: February 11, 2015Date of Patent: February 21, 2017Assignee: Cypress Semiconductor CorporationInventor: Kazunori Nishizono
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Publication number: 20160234893Abstract: Provided is a control circuit capable of suppressing flickering of an LED while preventing degradation of the power efficiency. A control circuit is configured to control electric power to an LED illumination based on a rectified drive voltage, the rectified drive voltage being a drive signal rectified by a rectifier, the drive signal being an AC signal whose phase is controlled by a dimmer including a switching device. The control circuit includes a time period detection part configured to detect a time period in which a voltage value of the rectified drive voltage is less than or equal to a predetermined value; and a dimmer current control part configured so that a control current to the dimmer is greater than or equal to a holding current of the switching device during the time period detected.Type: ApplicationFiled: February 11, 2015Publication date: August 11, 2016Inventor: Kazunori Nishizono
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Patent number: 8283934Abstract: A capacitance sensor includes a first charging voltage detector configured to detect a change in a voltage loaded into a first capacitor between an electrode and a ground terminal a second charging voltage detector configured to detect a change in a voltage loaded into a second capacitor among a plurality of electrodes and a determiner configured to generate a determination signal based on a detection voltage transmitted from each of the first charging voltage detector and second charging voltage detector.Type: GrantFiled: March 10, 2009Date of Patent: October 9, 2012Assignee: Fujitsu Semiconductor LimitedInventor: Kazunori Nishizono
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Patent number: 7990134Abstract: A correcting circuit includes a correction current synthesizer synthesizing a correction current based on an output signal of a sensor, a current adjuster adjusting a determining current which corresponds to a correction amount based on the correction current, and a correction voltage generator generating a correction voltage for correcting a voltage signal based on the determining current, so as to correct an output characteristic of a voltage signal output in correspondence to the output signal of the sensor.Type: GrantFiled: March 6, 2009Date of Patent: August 2, 2011Assignee: Fujitsu Semiconductor LimitedInventor: Kazunori Nishizono
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Publication number: 20090224746Abstract: A correcting circuit includes a correction current synthesizer synthesizing a correction current based on an output signal of a sensor, a current adjuster adjusting a determining current which corresponds to a correction amount based on the correction current, and a correction voltage generator generating a correction voltage for correcting a voltage signal based on the determining current, so as to correct an output characteristic of a voltage signal output in correspondence to the output signal of the sensor.Type: ApplicationFiled: March 6, 2009Publication date: September 10, 2009Applicant: FUJITSU MICROELECTRONICS LIMITEDInventor: Kazunori NISHIZONO
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Publication number: 20090224775Abstract: A capacitance sensor includes a first charging voltage detector configured to detect a change in a voltage loaded into a first capacitor between an electrode and a ground terminal a second charging voltage detector configured to detect a change in a voltage loaded into a second capacitor among a plurality of electrodes and a determiner configured to generate a determination signal based on a detection voltage transmitted from each of the first charging voltage detector and second charging voltage detector.Type: ApplicationFiled: March 10, 2009Publication date: September 10, 2009Applicant: FUJITSU MICROELECTRONICS LIMITEDInventor: Kazunori Nishizono
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Patent number: 7554784Abstract: A surge detection circuit for determining that the characteristics of an internal circuitry of a chip have deteriorated by surges applied from a sensor to the chip and generating a warning signal. The surge detection circuit is connected to an input terminal and includes a surge detector for detecting surge applied to the input terminal and generating an output signal showing the detection result. A determination unit determines that the characteristics of the input circuit have deteriorated based on the output signal of the surge detector and generates a warning signal based on the determination result.Type: GrantFiled: June 9, 2006Date of Patent: June 30, 2009Assignee: Fujitsu Microelectronics LimitedInventors: Toshiro Motoyoshi, Kazunori Nishizono
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Patent number: 7420404Abstract: A phase adjustor circuit and a phase adjusting method are capable of preventing a phase shift amount from fluctuating even if a frequency of a transmission carrier wave of a sensor signal fluctuates. A chopping wave converter circuit converts a pulse string signal into a chopping wave. A chopping wave amplitude control circuit compares the amplitude value of the chopping wave with an amplitude reference value and outputs an adjustment signal corresponding to a difference between those values to the chopping wave converter circuit. The chopping wave converter circuit changes a slope of the chopping wave according to the adjustment signal to adjust the amplitude value of the chopping wave. As a result, a feedback group is structured, and the amplitude value of the chopping wave is maintained to a constant value according to the amplitude reference value.Type: GrantFiled: June 7, 2006Date of Patent: September 2, 2008Assignee: Fujitsu LimitedInventors: Shoko Ito, Kazunori Nishizono
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Patent number: 7342454Abstract: An analog multistage amplification circuit for keeping the total gain of analog amplifiers constant while automatically controlling gain of the amplifiers in accordance with an input signal level and improving the S/N ratio of the output signal. The amplification circuit includes an input stage amplifier, an output stage amplifier, a filter connected between the input and output stage amplifiers, an auto gain control circuit for generating a control signal for controlling the gain of the input stage amplifier based on the output signal of the input stage amplifier so that the output signal has a maximum level, and a first gain adjustment circuit for generating an adjustment signal for adjusting the gain of the output stage amplifier so that the total gain of the input and output stage amplifiers is kept constant in accordance with the control signal of the auto gain control circuit.Type: GrantFiled: April 11, 2006Date of Patent: March 11, 2008Assignee: Fujitsu LimitedInventors: Seiji Sekimoto, Kazunori Nishizono
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Publication number: 20070188209Abstract: A phase adjustor circuit and a phase adjusting method are capable of preventing a phase shift amount from fluctuating even in the case where a frequency of a transmission carrier wave of a sensor signal fluctuates. A chopping wave converter circuit converts a pulse string signal into a chopping wave. A chopping wave amplitude control circuit compares the amplitude value of the chopping wave with an amplitude reference value, and outputs an adjustment signal corresponding to a difference between those values to the chopping wave converter circuit. The chopping wave converter circuit changes a slope of the chopping wave according to the adjustment signal to adjust the amplitude value of the chopping wave. As a result, a feedback group is structured, and the amplitude value of the chopping wave is maintained to a constant value according to the amplitude reference value.Type: ApplicationFiled: June 7, 2006Publication date: August 16, 2007Inventors: Shoko Ito, Kazunori Nishizono
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Publication number: 20070183113Abstract: A surge detection circuit for determining that the characteristics of an internal circuitry of a chip have deteriorated by surges applied from a sensor to the chip and generating a warning signal. The surge detection circuit is connected to an input terminal and includes a surge detector for detecting surge applied to the input terminal and generating an output signal showing the detection result. A determination unit determines that the characteristics of the input circuit have deteriorated based on the output signal of the surge detector and generates a warning signal based on the determination result.Type: ApplicationFiled: June 9, 2006Publication date: August 9, 2007Inventors: Toshiro Motoyoshi, Kazunori Nishizono
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Publication number: 20070146075Abstract: An analog multistage amplification circuit for keeping the total gain of analog amplifiers constant while automatically controlling gain of the amplifiers in accordance with an input signal level and improving the S/N ratio of the output signal. The amplification circuit includes an input stage amplifier, an output stage amplifier, a filter connected between the input and output stage amplifiers, an auto gain control circuit for generating a control signal for controlling the gain of the input stage amplifier based on the output signal of the input stage amplifier so that the output signal has a maximum level, and a first gain adjustment circuit for generating an adjustment signal for adjusting the gain of the output stage amplifier so that the total gain of the input and output stage amplifiers is kept constant in accordance with the control signal of the auto gain control circuit.Type: ApplicationFiled: April 11, 2006Publication date: June 28, 2007Inventors: Seiji Sekimoto, Kazunori Nishizono
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Patent number: 6891408Abstract: A current pulse receiving circuit suitable for converting a current pulse converted by a photodetector from a light pulse received in optical communications and outputting a logic level voltage pulse with an accurate pulse width is disclosed. When an output signal from a current-to-voltage converter circuit is detected to have a large amplitude by a large signal detection circuit, an amount of offset cancellation of a DC cancellation circuit is decreased to limit the amplitude of the output signal from the current-to-voltage converter circuit. Since the amplitude of an input signal of an amplifier circuit is limited, tail characteristics at a trailing edge of a pulse are small and an output is provided at an output terminal with an accurate pulse width.Type: GrantFiled: October 9, 2003Date of Patent: May 10, 2005Assignee: Fujitsu LimitedInventor: Kazunori Nishizono
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Patent number: 6867623Abstract: A receiving circuit including an amplifier for generating a receiving voltage signal, a comparator for generating a binary signal from the receiving voltage signal, and a logic maintaining circuit for receiving the binary signal and maintaining the binary signal at a shifted level for a predetermined period after the level of the binary signal is shifted. The logic maintaining circuit prevents noise pulses from appearing in a receiving signal.Type: GrantFiled: October 24, 2002Date of Patent: March 15, 2005Assignee: Fujitsu LimitedInventor: Kazunori Nishizono
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Patent number: 6788152Abstract: An amplification circuit used in an optical communication apparatus includes a first amplifier for generating a first voltage signal corresponding to an input current, a second amplifier for amplifying the first voltage signal and generating a second voltage signal, a gain control circuit for generating a gain control signal for adjusting the gain of the first amplifier based on the second voltage signal, and a bias control circuit for generating a bias control signal for adjusting the bias current at the output of the first amplifier based on the gain control signal. The bias control signal stabilizes the bias voltage of the first amplifier during gain adjustment of the first amplifier.Type: GrantFiled: April 18, 2003Date of Patent: September 7, 2004Assignee: Fujitsu LimitedInventor: Kazunori Nishizono
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Publication number: 20040075484Abstract: A current pulse receiving circuit suitable for converting a current pulse converted by a photodetector from a light pulse received in optical communications and outputting a logic level voltage pulse with an accurate pulse width is disclosed. When an output signal from a current-to-voltage converter circuit is detected to have a large amplitude by a large signal detection circuit, an amount of offset cancellation of a DC cancellation circuit is decreased to limit the amplitude of the output signal from the current-to-voltage converter circuit. Since the amplitude of an input signal of an amplifier circuit is limited, tail characteristics at a trailing edge of a pulse are small and an output is provided at an output terminal with an accurate pulse width.Type: ApplicationFiled: October 9, 2003Publication date: April 22, 2004Applicant: FUJITSU LIMITEDInventors: Kazunori Nishizono, Tatsuo Kumano
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Patent number: 6714063Abstract: A current pulse receiving circuit suitable for converting a current pulse converted by a photodetector from a light pulse received in optical communications and outputting a logic level voltage pulse with an accurate pulse width is disclosed. When an output signal from a current-to-voltage converter circuit is detected to have a large amplitude by a large signal detection circuit, an amount of offset cancellation of a DC cancellation circuit is decreased to limit the amplitude of the output signal from the current-to-voltage converter circuit. Since the amplitude of an input signal of an amplifier circuit is limited, tail characteristics at a trailing edge of a pulse are small and an output is provided at an output terminal with an accurate pulse width.Type: GrantFiled: August 8, 2002Date of Patent: March 30, 2004Assignee: Fujitsu LimitedInventor: Kazunori Nishizono
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Publication number: 20030197563Abstract: An amplification circuit used in an optical communication apparatus includes a first amplifier for generating a first voltage signal corresponding to an input current, a second amplifier for amplifying the first voltage signal and generating a second voltage signal, a gain control circuit for generating a gain control signal for adjusting the gain of the first amplifier based on the second voltage signal, and a bias control circuit for generating a bias control signal for adjusting the bias current at the output of the first amplifier based on the gain control signal. The bias control signal stabilizes the bias voltage of the first amplifier during gain adjustment of the first amplifier.Type: ApplicationFiled: April 18, 2003Publication date: October 23, 2003Applicant: FUJITSU LIMITEDInventor: Kazunori Nishizono
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Publication number: 20030098724Abstract: A receiving circuit including an amplifier for generating a receiving voltage signal, a comparator for generating a binary signal from the receiving voltage signal, and a logic maintaining circuit for receiving the binary signal and maintaining the binary signal at a shifted level for a predetermined period after the level of the binary signal is shifted. The logic maintaining circuit prevents noise pulses from appearing in a receiving signal.Type: ApplicationFiled: October 24, 2002Publication date: May 29, 2003Applicant: FUJITSU LIMITEDInventor: Kazunori Nishizono
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Publication number: 20020190777Abstract: A current pulse receiving circuit suitable for converting a current pulse converted by a photodetector from a light pulse received in optical communications and outputting a logic level voltage pulse with an accurate pulse width is disclosed. When an output signal from a current-to-voltage converter circuit is detected to have a large amplitude by a large signal detection circuit, an amount of offset cancellation of a DC cancellation circuit is decreased to limit the amplitude of the output signal from the current-to-voltage converter circuit. Since the amplitude of an input signal of an amplifier circuit is limited, tail characteristics at a trailing edge of a pulse are small and an output is provided at an output terminal with an accurate pulse width.Type: ApplicationFiled: August 8, 2002Publication date: December 19, 2002Applicant: FUJITSU LIMITEDInventors: Kazunori Nishizono, Tatsuo Kumano