Patents by Inventor Kazunori Yamaki

Kazunori Yamaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240172395
    Abstract: A wick sheet for a vapor chamber includes a first main body surface, a second main body surface located opposite the first main body surface, a frame body section, and a plurality of land sections apart from each other within the frame body section. A vapor path through which a vapor of a working fluid travels is between the plurality of land sections. A liquid flow channel section that communicates with the vapor path and through which the working fluid in a liquid form travels is at the second main body surface side of at least one of the land sections. A bridge that couples the land sections to the frame body section or that couples the land sections to each other is included. The bridge is reduced in thickness from at least one of the first main body surface side and the second main body surface side.
    Type: Application
    Filed: March 9, 2022
    Publication date: May 23, 2024
    Applicant: DAI NIPPON PRINTING CO., LTD.
    Inventors: Kazunori ODA, Shinichiro TAKAHASHI, Toshihiko TAKEDA, Takayuki OTA, Makoto YAMAKI, Youji KOZURU
  • Publication number: 20240125559
    Abstract: A body sheet for a vapor chamber includes a first body surface, a second body surface disposed opposite to the first body surface, and a penetration space extending from the first body surface to the second body surface. The penetration space extends in a first direction in plan view. As seen in a cross section perpendicular to the first direction, the penetration space includes a first opening positioned on the first body surface and a second opening positioned on the second body surface. The second opening extends from a region overlapping with the first opening in plan view to a position overlapping with the first groove in plan view.
    Type: Application
    Filed: February 2, 2022
    Publication date: April 18, 2024
    Applicant: DAI NIPPON PRINTING CO., LTD.
    Inventors: Kazunori ODA, Shinichiro TAKAHASHI, Takayuki OTA, Toshihiko TAKEDA, Shinya KIURA, Makoto YAMAKI, Isao INOUE
  • Patent number: 6148345
    Abstract: A sound controller has a signal pin for externally outputting the contents of bit 1 of a control register for controlling its operation mode as a power down signal POWERDOWN# for controlling a power supply to analog audio amplifiers. The power down signal POWERDOWN# output from the signal pin is sent to a power supply controller. The power supply controller switches supply/stop of a power supply voltage VCC2 to the analog audio amplifiers in response to the signal POWERDOWN#. With this control, the power down control of the analog audio amplifiers can be realized in accordance with the state of the sound controller.
    Type: Grant
    Filed: May 5, 1998
    Date of Patent: November 14, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazunori Yamaki
  • Patent number: 5680625
    Abstract: In a computer system, when an expansion unit is connected to a computer main body by an interface card, power supply control and I/O port selection are performed at the start of the computer system. In the power supply control, when an expansion power supply of the expansion unit is turned on, a first voltage is supplied to a main power supply of the computer main body. When the main power supply is turned on, main voltages are supplied to computer main body elements from the main power supply in response to the main voltage, and a second voltage is supplied to the expansion power supply through the interface. In response to the second voltage, expansion voltages is supplied to expansion unit elements, and an interface voltage is supplied to the interface. After the power supply control is completed, the I/O port selection is performed. The port addresses of the I/O ports in the computer main body are compared with the port addresses of the I/O ports in the expansion unit.
    Type: Grant
    Filed: March 21, 1995
    Date of Patent: October 21, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeru Sekine, Kazunori Yamaki, Nobutaka Nishigaki
  • Patent number: 5522062
    Abstract: A personal computer includes a connector to which first or second extended memory having different memory capacities is connected. The personal computer further includes a chip type register for storing identification information indicating which of the first and second extended memories is connected to the connector, an address range generation circuit for deriving an address range designated by each row address strobe signal based on the identification information, and a circuit for detecting a row address strobe signal which designates an address range to which the value of a memory address for accessing the first or second extended memory belongs, and activating the detected row address strobe signal.
    Type: Grant
    Filed: December 16, 1993
    Date of Patent: May 28, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazunori Yamaki
  • Patent number: 5440748
    Abstract: In a computer system, when an expansion unit is connected to a computer main body by an interface card, power supply control and I/O port selection are performed at the start of the computer system. In the power supply control, when an expansion power supply of the expansion unit is turned on, a first voltage is supplied to a main power supply of the computer main body. When the main power supply is turned on, main voltages are supplied to computer main body elements from the main power supply in response to the main voltage, and a second voltage is supplied to the expansion power supply through the interface. In response to the second voltage, expansion voltages is supplied to expansion unit elements, and an interface voltage is supplied to the interface. After the power supply control is completed, the I/O port selection is performed. The port addresses of the I/O ports in the computer main body are compared with the port addresses of the I/O ports in the expansion unit.
    Type: Grant
    Filed: July 6, 1993
    Date of Patent: August 8, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeru Sekine, Kazunori Yamaki, Nobutaka Nishigaki
  • Patent number: 5428798
    Abstract: In a computer system, when an expansion unit is connected to a computer main body by an interface card, power supply control and I/O port selection are performed at the start of the computer system. In the power supply control, when an expansion power supply of the expansion unit is turned on, a first voltage is supplied to a main power supply of the computer main body. When the main power supply is turned on, main voltages are supplied to computer main body elements from the main power supply in response to the main voltage, and a second voltage is supplied to the expansion power supply through the interface. In response to the second voltage, expansion voltages is supplied to expansion unit elements, and an interface voltage is supplied to the interface. After the power supply control is completed, the I/O port selection is performed. The port addresses of the I/O ports in the computer main body are compared with the port addresses of the I/O ports in the expansion unit.
    Type: Grant
    Filed: January 14, 1994
    Date of Patent: June 27, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeru Sekine, Kazunori Yamaki, Nobutaka Nishigaki
  • Patent number: 5072411
    Abstract: A computer system is provided which can be initialized in a condition to operate with one of a plurality of types of display controllers and display modes. The computer system includes a built-in display controller, a switch for enabling use of either the built-in display controller or an optional display controller, a random access memory (RAM) for storing setup data of the system, and a basic input/output system program (hereinafter system BIOS) for actuating the computer system in a condition to operate with a display controller to be selected by the user. The built-in display controller includes a read only memory (ROM) in which an identifier information is written. The system BIOS discriminates the type of the display controller which has been selected by the user by detecting whether or not the identifier information can be read. At least one optional display controller can be connected to the computer system.
    Type: Grant
    Filed: January 27, 1989
    Date of Patent: December 10, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazunori Yamaki