Patents by Inventor Kazuo Oouchi

Kazuo Oouchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7017264
    Abstract: The present invention provides a method of manufacturing a multilayer wiring board comprising the step of impregnating a raw material composition of a thermosetting resin in a porous laminated product including two or more porous layers and a wiring layer provided between the porous layers and formed on any of the porous layers and of half curing or curing them. Moreover, the present invention provides a multilayer wiring board having such a lamination structure that two or more porous layers and a wiring layer provided between the porous layers and formed on any of the porous layers are integrated through an impregnated and cured thermosetting resin.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: March 28, 2006
    Assignee: Nitto Denko Corporation
    Inventors: Kenichi Ikeda, Toshiyuki Kawashima, Nobuharu Tahara, Kazuo Oouchi
  • Publication number: 20020192870
    Abstract: The present invention provides a method of manufacturing a multilayer wiring board comprising the step of impregnating a raw material composition of a thermosetting resin in a porous laminated product including two or more porous layers and a wiring layer provided between the porous layers and formed on any of the porous layers and of half curing or curing them. Moreover, the present invention provides a multilayer wiring board having such a lamination structure that two or more porous layers and a wiring layer provided between the porous layers and formed on any of the porous layers are integrated through an impregnated and cured thermosetting resin.
    Type: Application
    Filed: June 11, 2002
    Publication date: December 19, 2002
    Inventors: Kenichi Ikeda, Toshiyuki Kawashima, Nobuharu Tahara, Kazuo Oouchi
  • Patent number: 4631110
    Abstract: A peeling type developing method and apparatus for removing exposed photoresist from printed circuit boards. The printed circuit board is covered with a photopolymerization compound layer and then a transparent support layer. After exposure, a thin adhesive tape is stuck to the support layer extending obliquely across the board and crossing opposite corners thereof. The adhesive tape, together with the support layer and the unexposed portions of the photoresist material, are peeled off the printed circuit board by a pair of pinch rolls with the aid of a peeling bar in line contact with the substrate through the adhesive tape and the support layer.
    Type: Grant
    Filed: July 25, 1985
    Date of Patent: December 23, 1986
    Assignee: Nitto Electric Industrial Co., Ltd.
    Inventors: Akio Tsumura, Shun-ichi Hayashi, Chiharu Miyaake, Kazuo Oouchi, Yutaka Yamamura