Abstract: An oil separator includes a plurality of separation discs rotatable together with a spindle and layered in an axis direction of the spindle, a nozzle that protrudes from a lower circumferential face of the spindle and configured to rotate the spindle by injection of an oil, a lower case has a gas inflow part into which blow-by gas flows, an oil discharge part into which an oil after separation is discharged, an upper case that sections together with the lower case a housing chamber in which spindle, separation discs and nozzle are housed, and a sectioning member that sections the housing chamber into a primary separation chamber, configured to primarily separate the oil mist, and a secondary separation chamber that secondarily separates the oil mist included in the gas after primary separation, and forms between the nozzle and the separation discs a communication opening that guides the gas being treated.

Abstract: A semiconductor integrated circuit device comprises I/O cells arranged around a core region. Each of the I/O cells comprises a level shifter circuit, an I/O logic circuit, and an I/O buffer circuit. An I/O logic region in which the I/O logic circuit is arranged and an I/O buffer region in which the I/O buffer circuit is arranged overlap with a region in which a pad for the I/O cell is arranged. The I/O logic region and the I/O buffer region are arranged side by side in a direction parallel to a side of the core region.

Abstract: An output signal characteristic of a differential amplifier circuit is improved. When an input data signal becomes ‘Low’, current flowing through a first transistor will decrease and potential at a connection (a node) between a first resistor and a second resistor will increase. This potential is input (negatively fed back) to the gate of a second transistor, and because this gate potential increases, a tail current amount is adjusted in an increasing direction. When the input data signal becomes ‘High’, the current of the first transistor increases and thus the potential at the node decreases. Thus, the gate potential (negative feedback) of the second transistor decreases, and the tail current amount is adjusted in a decreasing direction. Thus, in the rising and falling of an input waveform, the difference in a delay time with respect to the output waveform decreases, respectively.

Abstract: [Problem to be Solved] To enhance the performance for separation of oil mist from blow-by gas. [Solution] A filter element 13 which is to be attached to an oil separator unit 3 includes a core 31. This core is a double tube having an internal cylindrical member 34 and an external cylindrical member 35, and a space between the internal cylindrical member and the external cylindrical member is used as a separation chamber 36. An injection hole 39 for injecting blow-by gas while increasing its flow velocity is provided in the internal cylindrical member. A surface which is an inner wall surface of the external cylindrical member and which faces the injection hole is a spraying surface onto which the blow-by gas injected from the injection hole is sprayed. Moreover, an opening for oil discharge from which oil OL condensed on the spraying surface is discharged, and an opening for discharge from which the blow-by gas from which oil mist has been separated is discharged are provided in the core.

Abstract: An output signal characteristic of a differential amplifier circuit is improved. When an input data signal becomes ‘Low’, current flowing through a first transistor will decrease and potential at a connection (a node) between a first resistor and a second resistor will increase. This potential is input (negatively fed back) to the gate of a second transistor, and because this gate potential increases, a tail current amount is adjusted in an increasing direction. When the input data signal becomes ‘High’, the current of the first transistor increases and thus the potential at the node decreases. Thus, the gate potential (negative feedback) of the second transistor decreases, and the tail current amount is adjusted in a decreasing direction. Thus, in the rising and falling of an input waveform, the difference in a delay time with respect to the output waveform decreases, respectively.

Abstract: A mist separator for separating liquid mist from a gas containing the liquid mist includes a rotor fixed to a hollow rotary shaft and includes main rotating vanes; and a stator axially juxtaposed to the rotor. The stator includes main fixed vanes located downstream of the main rotating vanes on a flow path for the gas; and a cover that covers outer peripheries of the main fixed vanes and the main rotating vanes. The main fixed vanes are formed so as to cause the gas to flow radially inward from the outer peripheries thereof while a flow rate of the gas is decreased, and the cover is provided with a cover discharge port to discharge a recovery liquid which is a collection of the liquid mist to the outside of the cover.

Abstract: A semiconductor integrated circuit device comprises I/O cells arranged around a core region. Each of the I/O cells comprises a level shifter circuit, an I/O logic circuit, and an I/O buffer circuit. An I/O logic region in which the I/O logic circuit is arranged and an I/O buffer region in which the I/O buffer circuit is arranged overlap with a region in which a pad for the I/O cell is arranged. The I/O logic region and the I/O buffer region are arranged side by side in a direction parallel to a side of the core region.

Abstract: The present invention has for its purpose to provide a technique capable of reducing planar dimension of the semiconductor device. An input/output circuit is formed over the semiconductor substrate, a grounding wiring and a power supply wiring pass over the input/output circuit, and a conductive layer for a bonding pad is formed thereover. The input/output circuit is formed of MISFET elements in the nMISFET forming region and the pMISFET forming region, resistance elements in the resistance element forming regions and diode elements in the diode element forming regions functioning as protective elements. A wiring connected to the protective elements and positioned under the grounding wiring and the power supply wiring is pulled out in a pulling-out region between the nMISFET forming region and the pMISFET forming region and between the grounding wiring and the power supply wiring to be connected to the conductive layer.

Abstract: The present invention has for its purpose to provide a technique capable of reducing planar dimension of the semiconductor device. An input/output circuit is formed over the semiconductor substrate, a grounding wiring and a power supply wiring pass over the input/output circuit, and a conductive layer for a bonding pad is formed thereover. The input/output circuit is formed of MISFET elements in the nMISFET forming region and the pMISFET forming region, resistance elements in the resistance element forming regions and diode elements in the diode element forming regions functioning as protective elements. A wiring connected to the protective elements and positioned under the grounding wiring and the power supply wiring is pulled out in a pulling-out region between the nMISFET forming region and the pMISFET forming region and between the grounding wiring and the power supply wiring to be connected to the conductive layer.

Abstract: The present invention has for its purpose to provide a technique capable of reducing planar dimension of the semiconductor device. An input/output circuit is formed over the semiconductor substrate, a grounding wiring and a power supply wiring pass over the input/output circuit, and a conductive layer for a bonding pad is formed thereover. The input/output circuit is formed of MISFET elements in the nMISFET forming region and the pMISFET forming region, resistance elements in the resistance element forming regions and diode elements in the diode element forming regions functioning as protective elements. A wiring connected to the protective elements and positioned under the grounding wiring and the power supply wiring is pulled out in a pulling-out region between the nMISFET forming region and the pMISFET forming region and between the grounding wiring and the power supply wiring to be connected to the conductive layer.

Abstract: The object of the invention is to provide a method and an apparatus that allow production of metal plate chip resistors having a relatively low resistance with high accuracy and yield through simple process. The object is achieved by apparatus for manufacturing metal plate chip resistors including cutting mold for cutting intermediate product strip transversely to obtain worked product chip, ohm meter for measuring the resistance of the worked product chip, control device having a calculating part for performing a calculation using the resistance measured by the ohm meter to work out a width in which the strip is to be cut transversely so as to obtain a worked product chip of a desired resistance, and cutting width adjustor for making an adjustment so that the strip is to be cut transversely in the width obtained from the calculating part.

Abstract: The present invention has for its purpose to provide a technique capable of reducing planar dimension of the semiconductor device. An input/output circuit is formed over the semiconductor substrate, a grounding wiring and a power supply wiring pass over the input/output circuit, and a conductive layer for a bonding pad is formed thereover. The input/output circuit is formed of MISFET elements in the nMISFET forming region and the pMISFET forming region, resistance elements in the resistance element forming regions and diode elements in the diode element forming regions functioning as protective elements. A wiring connected to the protective elements and positioned under the grounding wiring and the power supply wiring is pulled out in a pulling-out region between the nMISFET forming region and the pMISFET forming region and between the grounding wiring and the power supply wiring to be connected to the conductive layer.

Abstract: A semiconductor integrated circuit device comprises I/O cells arranged around a core region. Each of the I/O cells comprises a level shifter circuit, an I/O logic circuit, and an I/O buffer circuit. An I/O logic region in which the I/O logic circuit is arranged and an I/O buffer region in which the I/O buffer circuit is arranged overlap with a region in which a pad for the I/O cell is arranged. The I/O logic region and the I/O buffer region are arranged side by side in a direction parallel to a side of the core region.

Abstract: An output signal characteristic of a differential amplifier circuit is improved. When an input data signal becomes ‘Low’, current flowing through a first transistor will decrease and potential at a connection (a node) between a first resistor and a second resistor will increase. This potential is input (negatively fed back) to the gate of a second transistor, and because this gate potential increases, a tail current amount is adjusted in an increasing direction. When the input data signal becomes ‘High’, the current of the first transistor increases and thus the potential at the node decreases. Thus, the gate potential (negative feedback) of the second transistor decreases, and the tail current amount is adjusted in a decreasing direction. Thus, in the rising and falling of an input waveform, the difference in a delay time with respect to the output waveform decreases, respectively.

Abstract: A semiconductor integrated circuit device comprises I/O cells arranged around a core region. Each of the I/O cells comprises a level shifter circuit, an I/O logic circuit, and an I/O buffer circuit. An I/O logic region in which the I/O logic circuit is arranged and an I/O buffer region in which the I/O buffer circuit is arranged overlap with a region in which a pad for the I/O cell is arranged. The I/O logic region and the I/O buffer region are arranged side by side in a direction parallel to a side of the core region.

Abstract: An output signal characteristic of a differential amplifier circuit is improved. When an input data signal becomes ‘Low’, current flowing through a first transistor will decrease and potential at a connection (a node) between a first resistor and a second resistor will increase. This potential is input (negatively fed back) to the gate of a second transistor, and because this gate potential increases, a tail current amount is adjusted in an increasing direction. When the input data signal becomes ‘High’, the current of the first transistor increases and thus the potential at the node decreases. Thus, the gate potential (negative feedback) of the second transistor decreases, and the tail current amount is adjusted in a decreasing direction. Thus, in the rising and falling of an input waveform, the difference in a delay time with respect to the output waveform decreases, respectively.

Abstract: In a level conversion circuit mounted in an integrated circuit device using a plurality of high- and low-voltage power supplies, the input to the differential inputs are provided. In a level-down circuit, MOS transistors that are not supplied with 3.3 V between the gate and drain and between the gate and source use a thin oxide layer. In a level-up circuit, a logic operation function is provided.

Abstract: A substrate manufacturing apparatus 100 has a substrate delivery path 120 through which a multi-unit substrate 110 is delivered and a mask delivery path 140 through which an individual mask 130 is delivered. The substrate delivery path 120 has a pad detecting device 160 for detecting a position of a pad 112 formed on a surface of the substrate 110. The mask delivery path 140 has a mask hole detecting device 220 for detecting a position of a conductive ball inserting hole 132 of the individual mask 130. A moving position of an adsorbing head 212 is adjusted in such a manner that the position of the conductive ball inserting hole 132 is coincident with that of the pad 112 of the substrate 110 based on pad position information of the pad detecting device 160 and mask hole position information of the mask hole detecting device 220.

Abstract: A centrifugal fan includes an impeller, a motor portion, and a housing. The housing includes an upper plate portion, a lower plate portion arranged to have the motor portion fixed thereto; and a side wall portion. A flow control member is arranged to extend in a line along a boundary between an inside surface of the side wall portion and one of a lower surface of the upper plate portion and an upper surface of the lower plate portion. The flow control member includes a flow control surface arranged to extend radially outward from the one of the lower surface of the upper plate portion and the upper surface of the lower plate portion to the inside surface of the side wall portion while becoming more distant from the one of the lower surface of the upper plate portion and the upper surface of the lower plate portion.

Abstract: The object of the invention is to provide a method and an apparatus that allow production of metal plate chip resistors having a relatively low resistance with high accuracy and yield through simple process. The object is achieved by apparatus for manufacturing metal plate chip resistors including cutting mold for cutting intermediate product strip transversely to obtain worked product chip, ohm meter for measuring the resistance of the worked product chip, control device having a calculating part for performing a calculation using the resistance measured by the ohm meter to work out a width in which the strip is to be cut transversely so as to obtain a worked product chip of a desired resistance, and cutting width adjustor for making an adjustment so that the strip is to be cut transversely in the width obtained from the calculating part.