Abstract: A semiconductor package, wherein, in bonding of members constituting the semiconductor package, by using bonding layers containing 98 wt % or more of one metallic element such as silver having a melting point of 400° C. or higher, the bonding is performed in a temperature range where the occurrence of warpage or distortion of the members is suppressed, and after the bonding, a high melting point is obtained; and by configuring the members so that all the surfaces of the members which become bonding surfaces of bonding layers are parallel to each other, all the thickness directions of the bonding layers are aligned to be in the same direction, and during the formation of the bonding layers, the pressing direction is set to be one-way direction which is the direction of laminating the members.

Abstract: A semiconductor device has a field effect transistor (FET), a mounting member, an output matching circuit board, a relay board, and first and second bonding wire. The FET includes plural cell regions arranged dispersedly and plural drain terminal electrodes connected to each cell region. The output matching circuit board is provided between an output conductive part and the FET, and has a first insulating substrate and a conductive part. A relay board is provided between the output matching circuit board and the FET. The relay board includes a second insulating substrate having a permittivity lower than a permittivity of the second insulating substrate of the output matching circuit board, and which has a relay conductive part on an upper surface of the second insulating substrate.

Abstract: A microwave semiconductor amplifier includes a semiconductor amplifier element, an input matching circuit and an output matching circuit. The semiconductor amplifying element includes an input electrode and an output electrode and has a capacitive output impedance. The input matching circuit is connected to the input electrode. The output matching circuit includes a bonding wire and a first transmission line. The bonding wire includes first and second end portions. The first end portion is connected to the output electrode. The second end portion is connected to one end portion of the first transmission line. A fundamental impedance and a second harmonic impedance seen toward the external load change toward the one end portion. The second harmonic impedance at the one end portion has an inductive reactance. The output matching circuit matches the capacitive output impedance of the semiconductor amplifying element to the fundamental impedance of the external load.

Abstract: A semiconductor package, wherein, in bonding of members constituting the semiconductor package, by using bonding layers containing copper and a low-melting-point metal such as tin, the bonding is performed in a temperature range where the occurrence of warpage or distortion of the members is suppressed, and after the bonding, a high melting point is obtained; and by configuring the members so that all the surfaces of the members which become bonding surfaces of bonding layers are parallel to each other, all the thickness directions of the bonding layers are aligned to be in the same direction, and during the formation of the bonding layers, the pressing direction is set to be one-way direction which is the direction of laminating the members.

Abstract: According to one embodiment, a joined structural body for mounting an electronic component on the body which is provided with a first member, a second member and a joining portion. The joining portion is provided between the first member and the second member so as to connect the first member and the second member with each other mechanically. The joining portion contains at least one metal of a tin, an indium or a zinc, and a copper. The content of the metal in the joining portion decreases toward a side of at least one of the first member and the second member, and the content of the copper in the joining portion increases in the same direction as the decreasing direction of the content of the metal.

Abstract: According to one embodiment, provided is a semiconductor device includes: a high frequency semiconductor chip; an input matching circuit disposed at the input side of the high frequency semiconductor chip; an output matching circuit disposed at the output side of the high frequency semiconductor chip; a high frequency input terminal connected to the input matching circuit; a high frequency output terminal connected to the output matching circuit, and a smoothing capacitor terminal connected to the high frequency semiconductor chip. The high frequency semiconductor chip, the input matching circuit and the output matching circuit are housed by one package.

Abstract: A semiconductor package, wherein, in bonding of members constituting the semiconductor package, by using bonding layers containing 98 wt % or more of one metallic element such as silver having a melting point of 400° C. or higher, the bonding is performed in a temperature range where the occurrence of warpage or distortion of the members is suppressed, and after the bonding, a high melting point is obtained; and by configuring the members so that all the surfaces of the members which become bonding surfaces of bonding layers are parallel to each other, all the thickness directions of the bonding layers are aligned to be in the same direction, and during the formation of the bonding layers, the pressing direction is set to be one-way direction which is the direction of laminating the members.

Abstract: A semiconductor package, wherein, in bonding of members constituting the semiconductor package, by using bonding layers containing copper and a low-melting-point metal such as tin, the bonding is performed in a temperature range where the occurrence of warpage or distortion of the members is suppressed, and after the bonding, a high melting point is obtained; and by configuring the members so that all the surfaces of the members which become bonding surfaces of bonding layers are parallel to each other, all the thickness directions of the bonding layers are aligned to be in the same direction, and during the formation of the bonding layers, the pressing direction is set to be one-way direction which is the direction of laminating the members.

Abstract: A semiconductor device has an FET, a mounting member, an output matching circuit board, a relay board, and first and second bonding wire. The FET has plural cell region arranged dispersedly and plural drain terminal electrodes connected to each cell region. The mounting member has an input conductive part and an output conductive part. The output matching circuit board is provided between an output conductive part and the FET, and has a first insulating substrate and a conductive part. The relay board is provided between the output matching circuit board and the FET, has a second insulating substrate having a permittivity lower than a permittivity of the first insulating substrate, and has a relay conductive part. The first bonding wire connects each drain terminal electrode and the relay conductive part. The second bonding wire connects the relay conductive part and the conductive part of the output matching circuit board.

Abstract: An field effect transistor has a plurality of cells provided on a first straight line. Each cell has a plurality of multi-finger electrodes and is connected to a gate terminal electrode and a drain terminal electrode. The multi-finger electrode has at least two finger gate electrodes, a finger drain electrode, and a finger source electrode. The gate terminal electrode connects the finger gate electrodes of two adjoining cells in common. The drain terminal electrode connects the finger drain electrodes of two adjoining cells in common. The finger gate electrode of one cell of two adjoining cells and the finger gate electrode of another cell of the two adjoining cells cross perpendicularly. The gate terminal electrode and the drain terminal electrode are provided alternately in a region where the finger gate electrodes of the two adjoining cells cross.

Abstract: According to one embodiment, a high frequency amplifier having a division circuit, FET cells, a stabilization circuit and a combination circuit is provided. The division circuit divides an input signal to produce a plurality of signals. The FET cells amplify the signals produced by the division circuit. The stabilization circuit provided with RC parallel-connected circuits which are respectively connected in series between the division circuit and gates of the FET cells. Each of the RC parallel-connected circuits has a capacitor and a resistor connected in parallel with each other. The combination circuit combines the signals amplified by the FET cells.

Abstract: According to one embodiment, provided are a package utilized for a high frequency semiconductor device and a fabrication method for such the package, the package including: a conductive base plate including a CTE control layer composed of compound material, and a heat conduction layer disposed on the CTE control layer and composed of Cu.

Abstract: According to an embodiment, a joint structure of package members housing or holding an electronic component includes a first member, a second member joined to the first member, and a joint portion provided between the first member and the second member. The joint portion contains a metal element with a melting point of 400° C. or more and the metal element of 98 percent by weight or more.

Abstract: A class-AB power amplifier according to the present embodiment includes an amplifying element whose power supply voltage is expressed as Vdc and whose maximum current is expressed as Imax, a conduction angle ?o of the amplifying element being more than ?(rad) and less than 2·?(rad), and load impedance of a fundamental wave being expressed as Z1=R1+j·X1, load impedance of a 2nd harmonic being expressed as Z2=R2+j·X2, and load impedance of a 3rd harmonic being expressed as Z3=R3+j?X3 which are observed from a dependent current source of an equivalent circuit of the amplifying element, and a relationship between variables X1 and R1 is set to ?0.5·R1<=X1<=0.5·R1, variable R1 is set to R1=Vdc/Imax·{1?cos(?o/2)}·?/{?o/2?sin(?o)/2}, variable X2/X1 is set to X2/X1=?2·{?o?sin(?o)}/{sin(?o/2)?sin(1.5·?o)/3}, and variable X3/X1 is set to X3/X1={?o?sin(?o)}/{sin(?o)/3?sin(2·?o)/6}, or each of the variables is set thereto so as to become equal substantially.

Abstract: According to an embodiment, a class-AB power amplifier includes an amplifying element whose power supply voltage is expressed as Vdc and whose maximum current is expressed as Imax, a conduction angle ?o of the amplifying element being more than ?(rad) and less than 2·?(rad), and load impedance of a fundamental wave being expressed as Z1=R1+j·X1 and load impedance of a 2nd harmonic being expressed as Z2=R2+j·X2 which are observed from a dependent current source of an equivalent circuit of the amplifying element, wherein a relationship between variables X1 and R1 is set to ?R1<=X1<=R1, variable R1 is set to R1=Vdc/Imax·?·{1?cos(?o/2)}/{?o/2?sin(?o)/2}, and variable X2/X1 is set to X2/X1=?{?o/2?sin(?o)/2}/{sin(?o/2)?sin(1.5·?o)/3}, or each of the variables is set thereto so as to become equal substantially.

Abstract: According to one embodiment, provided is a package and high frequency terminal structure for the same including: a conductive base plate; a semiconductor device disposed on the conductive base plate; a metal wall disposed on the conductive base plate to house the semiconductor device; a through-hole disposed in input and output units of the metal wall; a lower layer feed through inserted into the through-hole and disposed on the conductive base plate; and an upper layer feed through disposed on the lower layer feed through, and adhered to a sidewall of the metal wall. The lower layer feed through is surrounded by the metal wall.

Abstract: According to an embodiment, a power amplifier includes: an MMIC substrate; a high frequency probe pad disposed on the MMIC substrate; and a metal plate disposed on the MMIC substrate so as to adjoin to the high frequency probe pad, and connected to an MMIC external circuit via a bonding wire.

Abstract: According to one embodiment, a class-C power amplifier includes an amplifying element whose power supply voltage is expressed as Vdc and whose maximum current is expressed as Imax, a conduction angle ?o of the amplifying element being less than ?(rad), and load impedance of a fundamental wave being expressed as Z1=R1+j·X1 and load impedance of a 2nd harmonic being expressed as Z2=R2+j·X2 which are observed from a dependent current source of an equivalent circuit of the amplifying element, wherein a relationship between variables X1 and R1 is set to ?R1<=X1<=R1, variable R1 is set to R1=Vdc/Imax·?·{1?cos(?o/2)}/{?o/2?sin(?o)/2}, and variable X2/X1 is set to X2/X1=?{?o/2?sin(?o)/2}/{sin(?/2)?sin(1.5·?o)/3}, or each of the variables is set thereto so as to become equal substantially.

Abstract: A semiconductor device includes: substrate region; a gate electrode, a source electrode, and a drain electrode which are placed on a first surface of the substrate regions; an active area between gate and source placed between the gate electrode and the source electrode; an active area between gate and drain placed between the gate electrode and the drain electrode; an active area placed on the substrate region of the underneath part of the gate electrode, the source electrode, and the drain electrode; and a non-active area placed adjoining the active area, the active area between gate and source, and the active area between gate and drain. Furthermore, width WA1 of the active area between gate and source is wider than width WA2 of the active area between gate and drain. Channel resistance of an active area between source and gate placed between a gate electrode and a source electrode is reduced, and high-frequency performance is provided.

Abstract: A microwave semiconductor amplifier includes a semiconductor amplifier element, an input matching circuit and an output matching circuit. The semiconductor amplifying element includes an input electrode and an output electrode and has a capacitive output impedance. The input matching circuit is connected to the input electrode. The output matching circuit includes a bonding wire and a first transmission line. The bonding wire includes first and second end portions. The first end portion is connected to the output electrode. The second end portion is connected to one end portion of the first transmission line. A fundamental impedance and a second harmonic impedance seen toward the external load change toward the one end portion. The second harmonic impedance at the one end portion has an inductive reactance. The output matching circuit matches the capacitive output impedance of the semiconductor amplifying element to the fundamental impedance of the external load.