Patents by Inventor Kazuto OKAMOTO
Kazuto OKAMOTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11965948Abstract: According to one embodiment, a medical information processing apparatus includes processing circuitry configured to derive an index value with respect to noise included in data associated with magnetic resonance signals collected by each of a plurality of reception coils, adjust a degree to which noise is removed from the data associated with the magnetic resonance signals based on the derived index value, remove noise from the data associated with the magnetic resonance signals based on the adjusted degree, and perform compositing of the data associated with the magnetic resonance signals from which noise has been removed.Type: GrantFiled: December 20, 2022Date of Patent: April 23, 2024Assignee: CANON MEDICAL SYSTEMS CORPORATIONInventors: Yuichi Yamashita, Kazuto Nakabayashi, Hitoshi Kanazawa, Kazuya Okamoto, Hiroshi Takai, Nobuyuki Konuma, Kensuke Shinoda
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Patent number: 10134951Abstract: A method of manufacturing a light emitting device includes preparing a wafer having a sapphire substrate with semiconductor structures, forming a plurality of straight-line cleavage starting portions within the substrate by scanning a laser beam, and cleaving the wafer along the cleavage starting portions to obtain a plurality of light emitting devices each having a hexagonal shape. The forming step includes forming first cleavage starting portions with each first cleavage starting portion separated by a first interval from a common vertex point of three adjacent light emitting devices, forming second cleavage starting portions with each first cleavage starting portion separated by a second interval, which is shorter than the first interval, away from the common vertex point, and forming third cleavage starting portions with each first cleavage starting portion separated by a third interval, which is shorter than the first interval, away from the common vertex point.Type: GrantFiled: August 28, 2017Date of Patent: November 20, 2018Assignee: NICHIA CORPORATIONInventor: Kazuto Okamoto
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Patent number: 9991237Abstract: A light emitting device includes a base, a first light emitting element, a second light emitting element, and a sealing member. The first light emitting element has an active layer of a nitride semiconductor and has a first emission peak wavelength in a blue region. The second light emitting element has an active layer of a nitride semiconductor and has a second emission peak wavelength longer than the first emission peak wavelength of the first light emitting element. The sealing member includes a first region and a second region. The first region contains a phosphor to be excited by light from the first light emitting element. The first region is provided on an element mounting surface. A first upper surface of the first light emitting element is located in the first region. The second region does not substantially contain the phosphor and is provided on the first region.Type: GrantFiled: September 18, 2015Date of Patent: June 5, 2018Assignee: NICHIA CORPORATIONInventors: Shimpei Sasaoka, Kazuto Okamoto
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Publication number: 20180062032Abstract: A method of manufacturing a light emitting device includes preparing a wafer having a sapphire substrate with semiconductor structures, forming a plurality of straight-line cleavage starting portions within the substrate by scanning a laser beam, and cleaving the wafer along the cleavage starting portions to obtain a plurality of light emitting devices each having a hexagonal shape. The forming step includes forming first cleavage starting portions with each first cleavage starting portion separated by a first interval from a common vertex point of three adjacent light emitting devices, forming second cleavage starting portions with each first cleavage starting portion separated by a second interval, which is shorter than the first interval, away from the common vertex point, and forming third cleavage starting portions with each first cleavage starting portion separated by a third interval, which is shorter than the first interval, away from the common vertex point.Type: ApplicationFiled: August 28, 2017Publication date: March 1, 2018Inventor: Kazuto OKAMOTO
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Patent number: 9559253Abstract: A method of manufacturing a nitride semiconductor element includes preparing a wafer having a nitride semiconductor layer which includes p-type dopants, forming an altered portion by condensing laser beam on the wafer, and after the forming an altered portion, forming a p-type nitride semiconductor layer by subjecting the wafer to annealing.Type: GrantFiled: October 29, 2014Date of Patent: January 31, 2017Assignee: NICHIA CORPORATIONInventors: Junya Narita, Yohei Wakai, Kazuto Okamoto, Mizuki Nishioka
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Publication number: 20160086927Abstract: A light emitting device includes a base, a first light emitting element, a second light emitting element, and a sealing member. The first light emitting element has an active layer of a nitride semiconductor and has a first emission peak wavelength in a blue region. The second light emitting element has an active layer of a nitride semiconductor and has a second emission peak wavelength longer than the first emission peak wavelength of the first light emitting element. The sealing member includes a first region and a second region. The first region contains a phosphor to be excited by light from the first light emitting element. The first region is provided on an element mounting surface. A first upper surface of the first light emitting element is located in the first region. The second region does not substantially contain the phosphor and is provided on the first region.Type: ApplicationFiled: September 18, 2015Publication date: March 24, 2016Applicant: NICHIA CORPORATIONInventors: Shimpei SASAOKA, Kazuto OKAMOTO
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Patent number: 9287481Abstract: Disclosed is a vertical nitride semiconductor device including a conductive substrate; a semiconductor layer bonded to the conductive substrate via a second electrode; a metal layer formed on the conductive substrate; a first electrode formed on the semiconductor layer; and a bonding layer formed between the conductive substrate and the second electrode. The conductive substrate has a flange part, which extends from a side surface of the conductive substrate, on a side of the other front surface thereof. The flange part is formed in a manner in which the conductive substrate and the semiconductor layer are bonded together and then a remaining part of the conductive substrate is divided, the remaining part being formed by cutting off the semiconductor layer and part of the conductive substrate in a thickness direction so as to expose a side surface of the semiconductor layer and the side surface of the conductive substrate.Type: GrantFiled: August 14, 2015Date of Patent: March 15, 2016Assignee: NICHIA CORPORATIONInventors: Yoshikazu Matsuda, Kazuto Okamoto
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Publication number: 20150357539Abstract: Disclosed is a vertical nitride semiconductor device including a conductive substrate; a semiconductor layer bonded to the conductive substrate via a second electrode; a metal layer formed on the conductive substrate; a first electrode formed on the semiconductor layer; and a bonding layer formed between the conductive substrate and the second electrode. The conductive substrate has a flange part, which extends from a side surface of the conductive substrate, on a side of the other front surface thereof. The flange part is formed in a manner in which the conductive substrate and the semiconductor layer are bonded together and then a remaining part of the conductive substrate is divided, the remaining part being formed by cutting off the semiconductor layer and part of the conductive substrate in a thickness direction so as to expose a side surface of the semiconductor layer and the side surface of the conductive substrate.Type: ApplicationFiled: August 14, 2015Publication date: December 10, 2015Inventors: Yoshikazu MATSUDA, Kazuto OKAMOTO
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Patent number: 9196793Abstract: Disclosed is a vertical nitride semiconductor device including a conductive substrate; a semiconductor layer bonded to the conductive substrate via a second electrode; a metal layer formed on the conductive substrate; a first electrode formed on the semiconductor layer; and a bonding layer formed between the conductive substrate and the second electrode. The conductive substrate has a flange part, which extends from a side surface of the conductive substrate, on a side of the other front surface thereof. The flange part is formed in a manner in which the conductive substrate and the semiconductor layer are bonded together and then a remaining part of the conductive substrate is divided, the remaining part being formed by cutting off the semiconductor layer and part of the conductive substrate in a thickness direction so as to expose a side surface of the semiconductor layer and the side surface of the conductive substrate.Type: GrantFiled: March 26, 2013Date of Patent: November 24, 2015Assignee: NICHIA CORPORATIONInventors: Yoshikazu Matsuda, Kazuto Okamoto
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Publication number: 20150118775Abstract: A method of manufacturing a nitride semiconductor element includes preparing a wafer having a nitride semiconductor layer which includes p-type dopants, forming an altered portion by condensing laser beam on the wafer, and after the forming an altered portion, forming a p-type nitride semiconductor layer by subjecting the wafer to annealing.Type: ApplicationFiled: October 29, 2014Publication date: April 30, 2015Applicant: NICHIA CORPORATIONInventors: Junya NARITA, Yohei WAKAI, Kazuto OKAMOTO, Mizuki NISHIOKA
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Publication number: 20130256739Abstract: Disclosed is a vertical nitride semiconductor device including a conductive substrate; a semiconductor layer bonded to the conductive substrate via a second electrode; a metal layer formed on the conductive substrate; a first electrode formed on the semiconductor layer; and a bonding layer formed between the conductive substrate and the second electrode. The conductive substrate has a flange part, which extends from a side surface of the conductive substrate, on a side of the other front surface thereof. The flange part is formed in a manner in which the conductive substrate and the semiconductor layer are bonded together and then a remaining part of the conductive substrate is divided, the remaining part being formed by cutting off the semiconductor layer and part of the conductive substrate in a thickness direction so as to expose a side surface of the semiconductor layer and the side surface of the conductive substrate.Type: ApplicationFiled: March 26, 2013Publication date: October 3, 2013Applicant: NICHIA CORPORATIONInventors: Yoshikazu MATSUDA, Kazuto OKAMOTO