Patents by Inventor Kazutomi Mori

Kazutomi Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6812794
    Abstract: An inter-stage matching circuit 26 comprises a one-stage high pass filter type matching unit 28 and a one-stage low pass filter type matching unit 29 serially connected with each other.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: November 2, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazutomi Mori, Shintarou Shinjo, Fumimasa Kitabayashi, Yukio Ikeda
  • Patent number: 6750724
    Abstract: A bias condition of at least one amplifier among amplifiers other than a last-stage amplifier is set in consideration of the relation between an idle current and a saturation current.
    Type: Grant
    Filed: April 17, 2002
    Date of Patent: June 15, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazutomi Mori, Shintarou Shinjo, Yukio Ikeda
  • Patent number: 6750720
    Abstract: Between resistors 13, 14 and an NPN bipolar transistor 12 are interposed PNP bipolar transistors 21, 22 forming a current mirror 20 that uses a collector current of the NPN bipolar transistor 12 as a reference current, and determines a collector current of an NPN bipolar transistor 11. This makes possible to design a size ratio A of the PNP bipolar transistors 21, 22 so as to approximate a voltage drop &Dgr;Vb to a value close to zero, and to suppress the voltage drop &Dgr;Vb of the base voltage Vb accordingly to achieve a high power output and high efficiency when a high frequency input signal Pin increases and generates a base rectified current.
    Type: Grant
    Filed: June 12, 2002
    Date of Patent: June 15, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazutomi Mori, Shintarou Shinjo, Hiroyuki Joba, Yoshinori Takahashi, Yukio Ikeda, Tadashi Takagi
  • Patent number: 6674341
    Abstract: A miniaturized phase shifter and a multi-bit phase shifter are provided, in which filters are constructed using capacitors at FET pinch-off and pass phase can be shifted by turning the FET on and off, the phase shifter including: a first FET having a drain electrode connected to an input terminal and a source electrode connected to an output terminal; a second FET, in which one of a drain electrode and a source electrode thereof is connected to the source electrode of the first FET and the other is connected to ground via a first inductor; and a third FET, in which one of a drain electrode and a source electrode thereof is connected to the drain electrode of the first FET and the other is connected to ground via a second inductor.
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: January 6, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Morishige Hieda, Kenichi Miyaguchi, Kazutomi Mori, Michiaki Kasahara, Tadashi Takagi, Hiroshi Ikematsu, Norio Takeuchi, Hiromasa Nakaguro, Kazuyoshi Inami
  • Patent number: 6650181
    Abstract: A high-frequency amplifying unit 2 in which a steep gain variation developed according to a change in the amplitude of input high-frequency signal is suppressed is provided. It amplifies an input high-frequency signal with a transistor 12 at the same time a measuring circuit 27 measures amplitude of the input high-frequency signal, and a bias control circuit 26 continuously controls a bias applied to the transistor 12 according to the value of amplitude measured by the measuring circuit 27. Thus it is possible to suppress a steep gain variation produced according to a variation in the amplitude of input high-frequency signal.
    Type: Grant
    Filed: June 25, 2002
    Date of Patent: November 18, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shintaro Shinjo, Kazutomi Mori, Hiroyuki Joba, Hiroaki Nagano, Mitsuru Motizuki, Yukio Ikeda, Noriharu Suematsu
  • Publication number: 20030048135
    Abstract: A high-frequency amplifying unit 2 in which a steep gain variation developed according to a change in the amplitude of input high-frequency signal is suppressed is provided. It amplifies an input high-frequency signal with a plurality of transistors 12-1 to 12-N at the same time a measuring circuit 27 measures amplitude of the input high-frequency signal, and a bias control circuit 26 continuously controls a bias applied to each transistors 12-1 to 12-N according to the value of amplitude measured by the measuring circuit 27. Thus it is possible to suppress a steep gain variation produced according to a variation in the amplitude of input high-frequency signal.
    Type: Application
    Filed: July 2, 2002
    Publication date: March 13, 2003
    Inventors: Shintaro Shinjo, Kazutomi Mori, Hiroyuki Joba, Hiroaki Nagano, Mitsuru Motizuki, Yukio Ikeda, Norihasu Suematsu
  • Publication number: 20030020563
    Abstract: A miniaturized phase shifter and a multi-bit phase shifter are provided, in which filters are constructed using capacitors at FET pinch-off and pass phase can be shifted by turning the FET on and off, the phase shifter including: a first FET having a drain electrode connected to an input terminal and a source electrode connected to an output terminal; a second FET, in which one of a drain electrode and a source electrode thereof is connected to the source electrode of the first FET and the other is connected to ground via a first inductor; and a third FET, in which one of a drain electrode and a source electrode thereof is connected to the drain electrode of the first FET and the other is connected to ground via a second inductor.
    Type: Application
    Filed: August 27, 2002
    Publication date: January 30, 2003
    Inventors: Morishige Hieda, Kenichi Miyaguchi, Kazutomi Mori, Michiaki Kasahara, Tadashi Takagi, Hiroshi Ikematsu, Norio Takeuchi, Hiromasa Nakaguro, Kazuyoshi Inami
  • Publication number: 20030011435
    Abstract: A high-frequency semiconductor device according to the present invention achieves improvements in degradation of noise characteristics and a reduction in gain, and an improvement in reduction in power efficiency while suppressing a concentration of a current to multifinger HBTs. In the multifinger HBTs constituting a first stage and an output stage of an amplifier 10, basic HBTs 14 that constitute the multifinger HBT 12 corresponding to the first stage, are each made up of an HBT 14a and an emitter resistor 14b connected to the corresponding emitter of the HBT 14a, whereas basic HBTs 18 that constitute the multifinger HBT 16 corresponding to the output stage, are each comprised of an HBT 18a and a base resistor 18c connected to the corresponding base of the HBT 18a. The high-frequency semiconductor device according to the present invention is useful as a high output power amplifier used in satellite communications, ground microwave communications, mobile communications, etc.
    Type: Application
    Filed: September 3, 2002
    Publication date: January 16, 2003
    Inventors: Kazutomi Mori, Shintaro Shinjo, Kousei Maemura, Teruyuki Shimura, Kazuhiko Nakahara, Tadashi Takagi
  • Publication number: 20020171483
    Abstract: A high-frequency amplifying unit 2 in which a steep gain variation developed according to a change in the amplitude of input high-frequency signal is suppressed is provided. It amplifies an input high-frequency signal with a transistor 12 at the same time a measuring circuit 27 measures amplitude of the input high-frequency signal, and a bias control circuit 26 continuously controls a bias applied to the transistor 12 according to the value of amplitude measured by the measuring circuit 27. Thus it is possible to suppress a steep gain variation produced according to a variation in the amplitude of input high-frequency signal.
    Type: Application
    Filed: June 25, 2002
    Publication date: November 21, 2002
    Inventors: Shintaro Shinjo, Kazutomi Mori, Hiroyuki Joba, Hiroaki Nagano, Mitsuru Motizuki, Yukio Ikeda, Noriharu Suematsu
  • Patent number: 6462622
    Abstract: A T-type circuit having series resistors and a parallel resistor is arranged on the outside of an amplifier, a signal is amplified in the amplifier while stabilizing the signal by using the T-type circuit functioning as a stabilizing circuit, and the amplified signal is output. In this case, values of the series resistors and the parallel resistor of the T-type circuit are determined so as to set an output load impedance obtained by seeing the output side of the high-frequency amplifier from the amplifier to a value near to or slightly lower than a value of the conjugate complex impedance of an output impedance of the amplifier. Therefore, the output signal having a high output electric power and a low distortion can be obtained in the high-frequency amplifier while keeping a gain and a noise characteristic of the high-frequency amplifier.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: October 8, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazutomi Mori, Kazuhisa Yamauchi, Koji Yamanaka, Kazuhiko Nakahara, Tadashi Takagi
  • Publication number: 20010026600
    Abstract: A radio transmitter includes a gain compensation controller that derives the gain variation of the power amplifier from its bias voltage determined in response to its desired output power level, and that derives the control voltage of at least one of variable gain amplifiers from the gain variation. A variable gain amplifier gain controller applies the control voltage to the variable gain amplifier, thereby compensating for the gain variation of the power amplifier. The radio transmitter can solve a problem of a conventional radio transmitter in that it is unavoidable for the power amplifier to bring about the gain variation when its bias voltage is varied in response to the output power level.
    Type: Application
    Filed: March 29, 2001
    Publication date: October 4, 2001
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Mitsuru Mochizuki, Kazuhito Niwano, Masatoshi Nakayama, Kazutomi Mori, Shintaro Shinjo, Shinjiro Fukuyama, Yoshinori Matsunami, Naoyuki Sakuma
  • Patent number: 6236266
    Abstract: A bias circuit and bias supply method for a multistage power amplifier including heterojunction bipolar transistors for power amplifying a high frequency signal and suppressing an increase in Rx noise during low power output operation of the multistage power amplifier. The bias circuit outputs a control signal Vapc from an external control circuit to the base of only a first-stage amplifier HBT in the multistage power amplifier. To the base of the second and each later power amplifying stage HBT of the multistage power amplifier, the bias circuit supplies a bias current regulated by voltage stabilizers according to the control signal Vapc.
    Type: Grant
    Filed: November 22, 1999
    Date of Patent: May 22, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kenichiro Choumei, Kazutomi Mori, Akira Inoue, Toshio Okuda