Patents by Inventor Kazuyoshi Yamashita

Kazuyoshi Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240089619
    Abstract: The present technology relates to a light detection device and an electronic apparatus capable of increasing sensitivity of a specific pixel. The light detection device includes a pixel array unit in which a plurality of pixels is regularly arranged, the plurality of pixels including a first pixel and a second pixel, the first pixel including at least a photodiode and one or more pixel transistors, the second pixel including at least a photodiode larger in size than the photodiode of the first pixel, in which the pixel transistor in the first pixel is shared by the first pixel and the second pixel. The present technology may be applied to image sensors and the like, for example.
    Type: Application
    Filed: December 24, 2021
    Publication date: March 14, 2024
    Inventors: KAZUYOSHI YAMASHITA, KAZUHIRO GOI, SHINICHIRO NOUDO, TOMOHIRO YAMAZAKI, ATSUSHI TODA, TAKAYUKI OGASAHARA, KOJI MIYATA
  • Publication number: 20230262359
    Abstract: The present technology relates to a solid-state image sensor, an imaging device, and an electronic device capable of switching FD conversion efficiency in all pixels of a solid-state image sensor. A photodiode performs photoelectric conversion on incident light. A floating diffusion (FD) stores charge obtained by the photodiode. FD2, which is a second FD to which the capacity of an additional capacitor MIM is added, adds the capacity to the FD. The additional capacitor MIM is constituted by a first electrode formed by a wiring and a second electrode formed by a metallic light blocking film provided on a surface of a substrate on which the photodiode is formed. Switching between the FD and FD+FD2 allows switching of the FD conversion efficiency. The present technology is applicable to a CMOS image sensor.
    Type: Application
    Filed: April 25, 2023
    Publication date: August 17, 2023
    Applicant: SONY GROUP CORPORATION
    Inventors: Takashi MACHIDA, Kazuyoshi YAMASHITA
  • Publication number: 20230230986
    Abstract: A solid-state imaging element according to the present disclosure includes a first light receiving pixel, a second light receiving pixel, and a metal layer. The first light receiving pixel receives visible light. The second light receiving pixel receives infrared light. The metal layer is provided to face at least one of a photoelectric conversion unit of the first light receiving pixel and a photoelectric conversion unit of the second light receiving pixel on an opposite side of a light incident side, and contains tungsten as a main component.
    Type: Application
    Filed: April 14, 2021
    Publication date: July 20, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yoshiaki MASUDA, Kazuyoshi YAMASHITA, Shinichiro KURIHARA, Syogo KUROGI, Yusuke UESAKA, Toshiki SAKAMOTO, Hiroyuki KAWANO, Masatoshi IWAMOTO, Takashi TERADA, Sintaro NAKAJIKI, Shinta KOBAYASHI, Chihiro ARAI
  • Publication number: 20230215901
    Abstract: A solid-state imaging element that includes a semiconductor layer, a floating diffusion region (FD), a penetrating pixel separation region, and a non-penetrating pixel separation region. In the semiconductor layer, a visible-light pixel (PDc) that receives visible light and an infrared-light pixel (PDw) that receives infrared light are two-dimensionally arranged. The floating diffusion region is provided in the semiconductor layer and is shared by adjacent visible-light and infrared-light pixels. The penetrating pixel separation region is provided in a region excluding a region corresponding to the floating diffusion region in an inter-pixel region of the visible-light pixel and the infrared-light pixel, and penetrates the semiconductor layer in a depth direction.
    Type: Application
    Filed: April 12, 2021
    Publication date: July 6, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kazuyoshi YAMASHITA, Yoshiaki MASUDA, Shinichiro KURIHARA, Syogo KUROGI, Yusuke UESAKA, Toshiki SAKAMOTO, Hiroyuki KAWANO, Masatoshi IWAMOTO, Takashi TERADA, Sintaro NAKAJIKI
  • Publication number: 20230197748
    Abstract: The solid-state imaging element includes a plurality of first light receiving pixels that receives visible light, a plurality of second light receiving pixels that receives infrared light, a separation region, and a light shielding wall. The plurality of first light receiving pixels and the plurality of second light receiving pixels are arranged in a matrix, and the separation regionis arranged in a lattice pattern, light and has a plurality of intersection portions The light shielding wall is provided in the separation region and includes a first light shielding wall provided along a first direction in plan view, and a second light shielding wall provided along a second direction intersecting the first direction in plan view. In addition, the first light shielding wall and the second light shielding wall are spaced apart at the intersection portionof at least a part of the separation region.
    Type: Application
    Filed: April 13, 2021
    Publication date: June 22, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yusuke UESAKA, Kazuyoshi YAMASHITA, Yoshiaki MASUDA, Shinichiro KURIHARA, Syogo KUROGI, Toshiki SAKAMOTO, Hiroyuki KAWANO, Masatoshi IWAMOTO, Takashi TERADA, Sintaro NAKAJIKI
  • Patent number: 11678088
    Abstract: The present technology relates to a solid-state image sensor, an imaging device, and an electronic device capable of switching FD conversion efficiency in all pixels of a solid-state image sensor. A photodiode performs photoelectric conversion on incident light. A floating diffusion (FD) stores charge obtained by the photodiode. FD2, which is a second FD to which the capacity of an additional capacitor MIM is added, adds the capacity to the FD. The additional capacitor MIM is constituted by a first electrode formed by a wiring layer and a second electrode formed by a metallic light blocking film provided on a surface of a substrate on which the photodiode is formed. Switching between the FD and FD+FD2 allows switching of the FD conversion efficiency. The present technology is applicable to a CMOS image sensor.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: June 13, 2023
    Assignee: SONY CORPORATION
    Inventors: Takashi Machida, Kazuyoshi Yamashita
  • Patent number: 11621285
    Abstract: The present technology relates to a solid-state imaging device and a driving method thereof, and an electronic apparatus that make it possible to improve the precision of phase difference detection while suppressing deterioration of resolution in a solid-state imaging device having a global shutter function and a phase difference AF function. Provided is a solid-state imaging device including: a pixel array unit including, as pixels including an on-chip lens, a photoelectric conversion unit, and a charge accumulation unit, imaging pixels for generating a captured image and phase difference detection pixels for performing phase difference detection arrayed therein; and a driving control unit configured to control driving of the pixels. The imaging pixel is formed with the charge accumulation unit shielded from light.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: April 4, 2023
    Assignee: SONY CORPORATION
    Inventors: Jun Okuno, Kazuyoshi Yamashita
  • Patent number: 11438534
    Abstract: A solid-state imaging device according to an embodiment of the present disclosure includes a light-receiving surface and a plurality of pixels arranged to face the light-receiving surface. Each of the pixels includes a photoelectric conversion section that photoelectrically converts light incident via the light-receiving surface, a charge-holding section that holds charges transferred from the photoelectric conversion section, a first potential barrier provided between the photoelectric conversion section and the charge-holding section, and a second potential barrier provided around a region including the photoelectric conversion section, the charge-holding section, and a first impurity semiconductor region. The first potential barrier is lower than the second potential barrier.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: September 6, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Kazuyoshi Yamashita
  • Publication number: 20220139992
    Abstract: There is provided an image sensor including a first substrate including a plurality of pixels and a plurality of vertical signal lines and a plurality of first wiring layers and a second substrate including a plurality of second wiring layers. The first and second substrates are secured together between the pluralities of first and second wiring layers. First pads are provided between one of the plurality of first wiring layers and one of the plurality of second wiring layers and second pads are provided between another of the plurality of first wiring layers and another of the plurality of second wiring layers. First vias and second vias connect the first pads and the one of the plurality of first wiring layers and the one of the plurality of second wiring layers together.
    Type: Application
    Filed: February 28, 2020
    Publication date: May 5, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tomomi ITO, Kazuyoshi YAMASHITA, Atsushi MASAGAKI, Shinobu ASAYAMA, Shinya ITOH, Haruyuki NAKAGAWA, Kyohei MIZUTA, Susumu OOKI, Osamu OKA, Kazuto KAMIMURA, Takuji MATSUMOTO, Kenju NISHIKIDO
  • Publication number: 20210243394
    Abstract: A solid-state imaging device according to an embodiment of the present disclosure includes a light-receiving surface and a plurality of pixels arranged to face the light-receiving surface. Each of the pixels includes a photoelectric conversion section that photoelectrically converts light incident via the light-receiving surface, a charge-holding section that holds charges transferred from the photoelectric conversion section, a first potential barrier provided between the photoelectric conversion section and the charge-holding section, and a second potential barrier provided around a region including the photoelectric conversion section, the charge-holding section, and a first impurity semiconductor region. The first potential barrier is lower than the second potential barrier.
    Type: Application
    Filed: August 20, 2019
    Publication date: August 5, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Kazuyoshi YAMASHITA
  • Publication number: 20210218918
    Abstract: The present technology relates to a solid-state image sensor, an imaging device, and an electronic device capable of switching FD conversion efficiency in all pixels of a solid-state image sensor. A photodiode performs photoelectric conversion on incident light. A floating diffusion (FD) stores charge obtained by the photodiode. FD2, which is a second FD to which the capacity of an additional capacitor MIM is added, adds the capacity to the FD. The additional capacitor MIM is constituted by a first electrode formed by a wiring layer and a second electrode formed by a metallic light blocking film provided on a surface of a substrate on which the photodiode is formed. Switching between the FD and FD+FD2 allows switching of the FD conversion efficiency. The present technology is applicable to a CMOS image sensor.
    Type: Application
    Filed: March 29, 2021
    Publication date: July 15, 2021
    Inventors: Takashi MACHIDA, Kazuyoshi YAMASHITA
  • Publication number: 20210217791
    Abstract: The present technology relates to a solid-state imaging device and a driving method thereof, and an electronic apparatus that make it possible to improve the precision of phase difference detection while suppressing deterioration of resolution in a solid-state imaging device having a global shutter function and a phase difference AF function. Provided is a solid-state imaging device including: a pixel array unit including, as pixels including an on-chip lens, a photoelectric conversion unit, and a charge accumulation unit, imaging pixels for generating a captured image and phase difference detection pixels for performing phase difference detection arrayed therein; and a driving control unit configured to control driving of the pixels. The imaging pixel is formed with the charge accumulation unit shielded from light.
    Type: Application
    Filed: March 30, 2021
    Publication date: July 15, 2021
    Applicant: Sony Corporation
    Inventors: Jun Okuno, Kazuyoshi Yamashita
  • Patent number: 11032499
    Abstract: A photoelectric converter generates a charge corresponding to the exposure amount during an exposure period. The generated-charge retention portion and the output charge retention portion retain the charge. The generated-charge transfer portion transfers the charge from the photoelectric converter to the generated-charge retention portion to perform the transfer after the elapse of the exposure period. The retained-charge transfer portion transfers the charge retained in the generated-charge retention portion to the output charge retention portion to perform the transfer.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: June 8, 2021
    Assignee: SONY CORPORATION
    Inventors: Yoshimichi Kumagai, Takashi Abe, Kazuyoshi Yamashita, Ryoto Yoshita
  • Patent number: 10998356
    Abstract: The present technology relates to a solid-state imaging device and a driving method thereof, and an electronic apparatus that make it possible to improve the precision of phase difference detection while suppressing deterioration of resolution in a solid-state imaging device having a global shutter function and a phase difference AF function. Provided is a solid-state imaging device including: a pixel array unit including, as pixels including an on-chip lens, a photoelectric conversion unit, and a charge accumulation unit, imaging pixels for generating a captured image and phase difference detection pixels for performing phase difference detection arrayed therein; and a driving control unit configured to control driving of the pixels. The imaging pixel is formed with the charge accumulation unit shielded from light.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: May 4, 2021
    Assignee: SONY CORPORATION
    Inventors: Jun Okuno, Kazuyoshi Yamashita
  • Patent number: 10999545
    Abstract: The present technology relates to a solid-state image sensor, an imaging device, and an electronic device capable of switching FD conversion efficiency in all pixels of a solid-state image sensor. A photodiode performs photoelectric conversion on incident light. A floating diffusion (FD) stores charge obtained by the photodiode. FD2, which is a second FD to which the capacity of an additional capacitor MIM is added, adds the capacity to the FD. The additional capacitor MIM is constituted by a first electrode formed by a wiring layer and a second electrode formed by a metallic light blocking film provided on a surface of a substrate on which the photodiode is formed. Switching between the FD and FD+FD2 allows switching of the FD conversion efficiency. The present technology is applicable to a CMOS image sensor.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: May 4, 2021
    Assignee: Sony Corporation
    Inventors: Takashi Machida, Kazuyoshi Yamashita
  • Patent number: 10840278
    Abstract: An imaging device includes a pixel array including a plurality of pixel units in a matrix arrangement. At least a first pixel unit of the plurality of pixel units includes a substrate including a first photoelectric conversion region and a second photoelectric conversion region, and a first layer over the substrate and including a first pixel circuit and a second pixel circuit. The first pixel unit includes a second layer over the first layer and including first and second wirings extending in a first direction, and a third layer over the second layer and including signal lines that extend in the second direction. The first pixel unit includes a first via that couples a first signal line to the first wiring, and a second via offset from the first via in the first direction and that couples a second signal line to the second wiring.
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: November 17, 2020
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Kazuyoshi Yamashita
  • Patent number: 10784304
    Abstract: Provided is a solid-state imaging apparatus that is formed so that, in a pixel array unit in which combinations of a first pixel corresponding to a color component of a plurality of color components and a second pixel having higher sensitivity to incident light as compared with the first pixel are two-dimensionally arrayed, a first electrical barrier formed between a first photoelectric conversion unit and a first unnecessary electric charge drain unit in the first pixel, and a second electrical barrier formed between a second photoelectric conversion unit and a second unnecessary electric charge drain unit in the second pixel have different heights, respectively.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: September 22, 2020
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Kazuyoshi Yamashita
  • Publication number: 20200296311
    Abstract: The present technology relates to a solid-state image sensor, an imaging device, and an electronic device capable of switching FD conversion efficiency in all pixels of a solid-state image sensor. A photodiode performs photoelectric conversion on incident light. A floating diffusion (FD) stores charge obtained by the photodiode. FD2, which is a second FD to which the capacity of an additional capacitor MIM is added, adds the capacity to the FD. The additional capacitor MIM is constituted by a first electrode formed by a wiring layer and a second electrode formed by a metallic light blocking film provided on a surface of a substrate on which the photodiode is formed. Switching between the FD and FD+FD2 allows switching of the FD conversion efficiency. The present technology is applicable to a CMOS image sensor.
    Type: Application
    Filed: June 3, 2020
    Publication date: September 17, 2020
    Applicant: SONY CORPORATION
    Inventors: Takashi MACHIDA, Kazuyoshi YAMASHITA
  • Publication number: 20200235150
    Abstract: Imaging sensors, imaging apparatuses, and methods of driving an image sensor are provided. An image sensor can include a semiconductor substrate with a photoelectric conversion element and a charge-conversion element. The sensor can further include a capacitance switch. A charge accumulation element is located adjacent the photoelectric conversion element. At least a portion of the charge accumulation element overlaps a charge accumulation region of the photoelectric conversion element. The charge accumulation element is selectively connected to the charge-voltage conversion element by the capacitance switch.
    Type: Application
    Filed: April 7, 2020
    Publication date: July 23, 2020
    Inventor: KAZUYOSHI YAMASHITA
  • Patent number: 10651213
    Abstract: Imaging sensors, imaging apparatuses, and methods of driving an image sensor are provided. An image sensor can include a semiconductor substrate with a photoelectric conversion element and a charge-conversion element. The sensor can further include a capacitance switch. A charge accumulation element is located adjacent the photoelectric conversion element. At least a portion of the charge accumulation element overlaps a charge accumulation region of the photoelectric conversion element. The charge accumulation element is selectively connected to the charge-voltage conversion element by the capacitance switch.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: May 12, 2020
    Assignee: SONY CORPORATION
    Inventor: Kazuyoshi Yamashita