Patents by Inventor Ke Yin

Ke Yin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240115541
    Abstract: The invention provides a method for treating cerebral apoplexy and hyperbilirubinemia by the compound or reagent for competitively inhibiting or blocking combination of bilirubin and the TRPM2 channel. The compound or the reagent is competitively combined with the D1069 residue of TRPM2 channel (the analogous D1066 residue of the mouse TRPM2). It is verified that bilirubin can serve as an extracellular endogenous agonist to be directly combined with the TRPM2 channel to aggravate brain tissue damage caused by stroke and hyperbilirubinemia, K928 and/or D1069 residues are key amino acid residues for playing roles. When the K928 and/or D1069 residues are mutated or competitively combined, the bilirubin is prevented from activating the TRPM2 channel; wherein D1069 residue mutation can effectively antagonize the nerve injury effect caused by bilirubin, which would be a therapeutic target for relieving and treating ischemic stroke and hyperbilirubinemia related brain damage.
    Type: Application
    Filed: March 28, 2023
    Publication date: April 11, 2024
    Inventors: Shankai YIN, Haibo SHI, Hanwei LIU, Ke LAI, Luyang WANG
  • Patent number: 11940992
    Abstract: A model file management method includes that a terminal device receives a storage address of a target model file package from a server and the terminal device obtains the target model file package based on the storage address of the target model file package, where the target model file package is based on a parameter of a model file package locally stored in the terminal device and a parameter of a model file package managed by the server. In an artificial intelligence (AI) field, an application may implement a specific function by using an AI model file. An application is decoupled from an AI model file such that the terminal device performs centralized management on a general model file.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: March 26, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Qing Su, Junyuan Yang, Wenshuai Yin, Yue Gu, Ke Wan
  • Publication number: 20240095000
    Abstract: An electronic device receives a first user operation. The first user operation is used to request to install a first plug-in related to a first application, the first application includes a first plug-in framework and at least one plug-in associated with the first plug-in framework, a major version number of each of the at least one plug-in is the same as a major version number of the first plug-in framework, and the first plug-in is different from the at least one plug-in. The electronic device receives the first plug-in from a server. The electronic device detects whether a major version number of the first plug-in is the same as the major version number of the first plug-in framework. If yes, the electronic device installs the first plug-in.
    Type: Application
    Filed: September 15, 2020
    Publication date: March 21, 2024
    Inventors: Yue Gu, Wenshuai Yin, Ke Wan, Xiang Xu, Mingjiang Li
  • Patent number: 11930428
    Abstract: Provided are a method and system for realizing a service-based mobile originated short message service. The method for realizing a service-based mobile originated short message service (MO SMS) includes: after receiving a short message transferred from a user equipment, an SMSF entity querying, from a NRF entity, information of a network function that can provide a MO SMS forwarding service; when it is determined, according to a query result, that a corresponding SMS-IWMSC can provide the MO SMS forwarding service, the SMSF entity sending the short message to the SMS-IWMSC; and the SMS-IWMSC sending the short message to a SC, so that the SC sends the short message to a corresponding receiver of the short message.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: March 12, 2024
    Assignee: CHINA TELECOM CORPORATION LIMITED
    Inventors: Liu Liu, Biao Long, Yue Sun, Jiayifan Liu, Zhuoyi Chen, Mingxue Li, Qingyang Wang, Linfeng Zhang, Ke Yin, Lei Cao, Bo Wang, Ye Zhao
  • Patent number: 11915655
    Abstract: A shift register unit, a method for driving a shift register unit, a gate driving circuit, and a display device are provided. The shift register unit includes: an input control circuit, configured to control a level of the first node; a first control circuit, configured to control a level of the second node; a second control circuit, configured to control the level of the second node under control of a fourth clock signal and an output signal; an output circuit, configured to control a level of the output terminal under control of the level of the first node and the level of the second node; and a first reset circuit, configured to control the level of the output terminal under control of the first enable signal, so as to allow the output terminal to stably output a non-operating level during a detection phase.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: February 27, 2024
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Jiangnan Lu, Guangliang Shang, Xinshe Yin, Libin Liu, Ke Feng
  • Publication number: 20230403539
    Abstract: Provided are a method and system for realizing a service-based mobile originated short message service. The method for realizing a service-based mobile originated short message service (MO SMS) includes: after receiving a short message transferred from a user equipment, an SMSF entity querying, from a NRF entity, information of a network function that can provide a MO SMS forwarding service; when it is determined, according to a query result, that a corresponding SMS-IWMSC can provide the MO SMS forwarding service, the SMSF entity sending the short message to the SMS-IWMSC; and the SMS-IWMSC sending the short message to a SC, so that the SC sends the short message to a corresponding receiver of the short message.
    Type: Application
    Filed: October 18, 2021
    Publication date: December 14, 2023
    Inventors: Liu LIU, Biao LONG, Yue SUN, Jiayifan LIU, Zhuoyi CHEN, Mingxue LI, Qingyang WANG, Linfeng ZHANG, Ke YIN, Lei CAO, Bo WANG, Ye ZHAO
  • Publication number: 20230287418
    Abstract: Disclosed is a modified siRNA with a reduced off-target activity. The siRNA comprises a sense strand and an antisense strand, wherein the antisense strand contains a chemical modification as represented by formula (I) or a tautomeric modification thereof in at least one nucleotide position from position 2 to position 8 of 5? region thereof. A conjugate, a pharmaceutical composition, a cell or a kit containing the siRNA, and the medical use of the siRNA, the conjugate and/or the pharmaceutical composition thereof are also disclosed. Further disclosed are compounds as represented by formula (II) and formula (III) or tautomers thereof, and preparation methods therefor.
    Type: Application
    Filed: August 4, 2021
    Publication date: September 14, 2023
    Inventors: Jinyu HUANG, Min LUO, Ke YIN
  • Patent number: 11755368
    Abstract: Systems and methods are disclosures for scheduling code in a multiprocessor system. Code is portioned into code blocks by a compiler. The compiler schedules execution of code blocks in nodes. The nodes are connected in a directed acyclical graph with a top node, terminal node and a plurality of intermediate nodes. Execution of the top node is initiated by the compiler. After executing at least one instance of the top node, an instruction in the code block indicates to the scheduler to initiate at least one intermediary node. The scheduler schedules a thread for execution of the intermediary node. The data for the nodes resides in a plurality of data buffers; the index to the data buffer is stored in a command buffer.
    Type: Grant
    Filed: August 8, 2021
    Date of Patent: September 12, 2023
    Assignee: Blaize , Inc.
    Inventors: Satyaki Koneru, Val G. Cook, Ke Yin
  • Publication number: 20230188475
    Abstract: This disclosure provides a network resource pre-allocation method, device, system, and medium, wherein the method includes: an NWDAF acquiring historical record information of a user accessing a service, and generating user service preference prediction and suggestion information according to the historical record information; and the NWDAF sending the user service preference prediction and suggestion information to a network function (NF) so that the NF pre-allocates a network resource according to the user service preference prediction and suggestion information.
    Type: Application
    Filed: April 25, 2021
    Publication date: June 15, 2023
    Inventors: Danmo WANG, Biao LONG, Yue SUN, Jiayifan LIU, Liu LIU, Mingxue LI, Ke YIN, Linfeng ZHANG, Qingyang WANG, Bo WANG, Ye ZHAO, Lei CAO
  • Patent number: 11593911
    Abstract: The described embodiments include systems, methods, and apparatuses for increased efficiency processing flow. One method includes a plurality of stages configured to process an execution graph that includes a plurality of logical nodes with defined properties and resources associated with each logical node of the plurality of logical nodes, a recirculating ring buffer, wherein the recirculating ring buffer is configured to holding only any one of a control information, input, and, or out data necessary to stream a temporary data between each logical node of the execution graph, and a data producer, wherein the data producer is configured to stall from writing control information into a command buffer upon the command buffer being full, preventing command buffer over-writing.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: February 28, 2023
    Assignee: Blaze, Inc.
    Inventors: Val G. Cook, Satyaki Koneru, Ke Yin, Dinakar C. Munagala
  • Patent number: 11416282
    Abstract: Systems, apparatuses and methods are disclosed for scheduling threads comprising of code blocks in a graph streaming processor (GSP) system. One system includes a scheduler for scheduling plurality of threads, the plurality of threads includes a set of instructions operating on the graph streaming processors of GSP system. The scheduler comprises a plurality of stages where each stage is coupled to an input command buffer and an output command buffer. A portion of the scheduler is implemented in hardware and comprises of a command parser operative to interpret commands within a corresponding input command buffer, a thread generator coupled to the command parser operate to generate the plurality of threads, and a thread scheduler coupled to the thread generator for dispatching the plurality of threads for operating on the plurality of graph streaming processors.
    Type: Grant
    Filed: April 14, 2019
    Date of Patent: August 16, 2022
    Assignee: Blaize, Inc.
    Inventors: Satyaki Koneru, Val G. Cook, Ke Yin
  • Publication number: 20210406069
    Abstract: Systems and methods are disclosures for scheduling code in a multiprocessor system. Code is portioned into code blocks by a compiler. The compiler schedules execution of code blocks in nodes. The nodes are connected in a directed acyclical graph with a top node, terminal node and a plurality of intermediate nodes. Execution of the top node is initiated by the compiler. After executing at least one instance of the top node, an instruction in the code block indicates to the scheduler to initiate at least one intermediary node. The scheduler schedules a thread for execution of the intermediary node. The data for the nodes resides in a plurality of data buffers; the index to the data buffer is stored in a command buffer.
    Type: Application
    Filed: August 8, 2021
    Publication date: December 30, 2021
    Applicant: Blaize, Inc.
    Inventors: Satyaki Koneru, Val G. Cook, Ke Yin
  • Publication number: 20210374901
    Abstract: The described embodiments include systems, methods, and apparatuses for increased efficiency processing flow. One method includes a plurality of stages configured to process an execution graph that includes a plurality of logical nodes with defined properties and resources associated with each logical node of the plurality of logical nodes, a recirculating ring buffer, wherein the recirculating ring buffer is configured to holding only any one of a control information, input, and, or out data necessary to stream a temporary data between each logical node of the execution graph, and a data producer, wherein the data producer is configured to stall from writing control information into a command buffer upon the command buffer being full, preventing command buffer over-writing.
    Type: Application
    Filed: August 9, 2021
    Publication date: December 2, 2021
    Applicant: Blaize, Inc.
    Inventors: Val G. Cook, Satyaki Koneru, Ke Yin, Dinakar C. Munagala
  • Patent number: 11151684
    Abstract: The described embodiments include systems, methods, and apparatuses for increased efficiency processing flow. One method includes a plurality of stages configured to process an execution graph that includes a plurality of logical nodes with defined properties and resources associated with each logical node of the plurality of logical nodes, a recirculating ring buffer, wherein the recirculating ring buffer is configured to holding only any one of a control information, input, and, or out data necessary to stream a temporary data between each logical node of the execution graph, and a data producer, wherein the data producer is configured to stall from writing control information into a command buffer upon the command buffer being full, preventing command buffer over-writing.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: October 19, 2021
    Assignee: Blaize, Inc.
    Inventors: Val G. Cook, Satyaki Koneru, Ke Yin, Dinakar C. Munagala
  • Patent number: 11126462
    Abstract: Systems and methods are disclosures for scheduling code in a multiprocessor system. Code is portioned into code blocks by a compiler. The compiler schedules execution of code blocks in nodes. The nodes are connected in a directed acyclical graph with a top node, terminal node and a plurality of intermediate nodes. Execution of the top node is initiated by the compiler. After executing at least one instance of the top node, an instruction in the code block indicates to the scheduler to initiate at least one intermediary node. The scheduler schedules a thread for execution of the intermediary node. The data for the nodes resides in a plurality of data buffers; the index to the data buffer is stored in a command buffer.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: September 21, 2021
    Assignee: Blaize, Inc.
    Inventors: Satyaki Koneru, Val G. Cook, Ke Yin
  • Publication number: 20210108544
    Abstract: The present disclosure provides an exhaust system for an internal combustion engine, the exhaust system comprising a first exhaust pipe, a muffler and a second exhaust pipe, and the muffler is mounted between the first exhaust pipe and the second exhaust pipe, the first exhaust pipe is located upstream of the muffler, and the second exhaust pipe is located downstream of the muffler; the second exhaust pipe comprises a single exhaust pipe, the single exhaust pipe having one end connected to a downstream end of the muffler, and the single exhaust pipe being provided with a plurality of connecting holes; or, the second exhaust pipe comprises the single exhaust pipe and a dual exhaust pipe branch, the single exhaust pipe having one end connected to the downstream end of the muffler and the other end connected to the dual exhaust pipe branch.
    Type: Application
    Filed: September 24, 2020
    Publication date: April 15, 2021
    Inventors: Dennis BOENNEN, Pengzhou GU, BO YUAN, Olivier PULA, Le YU, Ke YIN
  • Publication number: 20200320663
    Abstract: The described embodiments include systems, methods, and apparatuses for increased efficiency processing flow. One method includes a plurality of stages configured to process an execution graph that includes a plurality of logical nodes with defined properties and resources associated with each logical node of the plurality of logical nodes, a recirculating ring buffer, wherein the recirculating ring buffer is configured to holding only any one of a control information, input, and, or out data necessary to stream a temporary data between each logical node of the execution graph, and a data producer, wherein the data producer is configured to stall from writing control information into a command buffer upon the command buffer being full, preventing command buffer over-writing.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Applicant: Blaize, Inc.
    Inventors: Val G. Cook, Satyaki Koneru, Ke Yin, Dinakar C. Munagala
  • Patent number: 10740868
    Abstract: The described embodiments include systems, methods, and apparatuses for increased efficiency processing flow. One method includes a plurality of stages configured to process an execution graph that includes a plurality of logical nodes with defined properties and resources associated with each logical node of the plurality of logical nodes, a recirculating ring buffer, wherein the recirculating ring buffer is configured to holding only any one of a control information, input, and, or out data necessary to stream a temporary data between each logical node of the execution graph, and a data producer, wherein the data producer is configured to stall from writing control information into a command buffer upon the command buffer being full, preventing command buffer over-writing.
    Type: Grant
    Filed: November 28, 2019
    Date of Patent: August 11, 2020
    Assignee: Blaize, Inc.
    Inventors: Val G. Cook, Satyaki Koneru, Ke Yin, Dinakar C. Munagala
  • Publication number: 20200098084
    Abstract: The described embodiments include systems, methods, and apparatuses for increased efficiency processing flow. One method includes a plurality of stages configured to process an execution graph that includes a plurality of logical nodes with defined properties and resources associated with each logical node of the plurality of logical nodes, a recirculating ring buffer, wherein the recirculating ring buffer is configured to holding only any one of a control information, input, and, or out data necessary to stream a temporary data between each logical node of the execution graph, and a data producer, wherein the data producer is configured to stall from writing control information into a command buffer upon the command buffer being full, preventing command buffer over-writing.
    Type: Application
    Filed: November 28, 2019
    Publication date: March 26, 2020
    Applicant: ThinCI, Inc.
    Inventors: Val G. Cook, Satyaki Koneru, Ke Yin, Dinakar C. Munagala
  • Patent number: 10540740
    Abstract: The claimed invention discloses system comprising a plurality of logical nodes comprised in a single or plurality of stages, with defined properties and resources associated with each node, for reducing compute resources, said system further comprising: at least a recirculating ring buffer holding only any one of a control information, input, and, or out data necessary to stream a temporary data between node and, or nodes in an execution graph, thereby reducing size of said recirculating ring buffer; said recirculating ring buffer being sufficiently reduced in size to reside in an on-chip cache, such that any one of the control information, input, and, or out data between node and, or nodes need not be stored in memory; wherein the control information further comprises a command related to invalidating any one of the input and, or out data held in a recirculating ring data buffer, clearing the buffer of tasked data; and wherein a producer is stalled from writing any more control information into a recirculati
    Type: Grant
    Filed: May 18, 2019
    Date of Patent: January 21, 2020
    Assignee: Blaize, Inc.
    Inventors: Val G. Cook, Satyaki Koneru, Ke Yin, Dinakar C. Munagala