Abstract: The present invention relates to a method for determining the DNA quality of a biological sample and, more specifically, to a method for determining the DNA quality of a biological sample by performing a quantitative polymerase chain reaction (PCR) using primers capable of amplifying a target gene, a method for preparing the primers used in the method, and a method for standardizing the amount of detected target gene mutation by using the determined DNA quality. The method of the present invention enables objective evaluation of the DNA quality of a biological sample used in gene analysis and the presentation of objective results on the expression ratio of a gene mutation, thereby providing reliable information in the fields of clinical research and companion diagnosis.

Abstract: The present invention relates to a human Lefty A protein variant with improved productivity and stability, a fusion protein comprising the protein variant, and a composition for preventing and/or treating neuromuscular disease comprising the protein variant or the fusion protein. According to the present invention, a human Lefty A protein variant and a fusion protein comprising the variant are constructed, which have better stability than naturally occurring human Lefty A protein, and thus are expressed at high levels and produced in high yield in animal cells. In addition, administration of the constructed human Lefty A protein variant or fusion protein can restore the nerve and motor functions of nerve disease model animals. Accordingly, the use of the human Lefty A protein variant or fusion protein can effectively prevent or treat various nerve diseases and muscle diseases.

Abstract: The present invention relates to a novel antibody or an antigen binding fragment thereof that specifically binds to a human hepatocyte growth factor receptor (c-Met), and a composition for preventing or treating cancer, wherein the antibody shows an excellent cancer cell proliferation inhibitory activity and a remarkably excellent anticancer activity even by a little amount thereof, thus effectively preventing or treating cancer.

Abstract: The embodiments described herein relate generally to medical devices that measure vital signs, and more particularly to wearable wireless devices that collect multiple simultaneous vital signs, and systems and methods for compressing the sensor data into a matrix representation to facilitate collecting, transmitting, processing, and displaying vital sign data.

Abstract: The invention relates to a product and a process for fabricating a 1D, 2D, or 3D layered micro or nano component that comprises providing an electrode having a micro-scale or nano-scale tip, and applying electric current to the electrode tip in the presence of a micro-scale or nano-scale powder.

Abstract: The present invention relates to a novel antibody or an antigen binding fragment thereof that specifically binds to a human hepatocyte growth factor receptor (c-Met), and a composition for preventing or treating cancer, wherein the antibody shows an excellent cancer cell proliferation inhibitory activity and a remarkably excellent anticancer activity even by a little amount thereof, thus effectively preventing or treating cancer.

Abstract: A smart card may include data storage and transmission circuitry, a plurality of voltage controllers to supply operational power to card circuitry, a plurality of oscillators to supply an internal clock for the card, and power management circuitry. The power management circuitry may be configured to shut down the oscillators and at least one, but not all, voltage controllers during a period after a data transmission is completed.

Abstract: An apparatus, method, chipset, and non-transitory computer-readable storage medium for controlling power are provided. The apparatus includes a receiver configured to receive a data frame and first information related to a next data frame of the data frame; and a controller configured to determine an operation mode as an active mode or a sleep mode based on destination address information of the next data frame and duration information indicating a time during which transmission of the next data frame occurs, wherein the destination address information and the duration information are included in the first information.

Abstract: Disclosed herein, in certain embodiments, is a method of depositing a polymer onto a surface. In some embodiments, the method comprises using a high electric field and a high frequency vibratory motion to deposit a polymer solution onto the surface. Disclosed herein, in certain embodiments, is a method of manufacturing an electrode or diode. In some embodiments, the method comprises using a high electric field and a high frequency vibratory motion to deposit a polymer onto a surface. Further disclosed herein, in certain instances, is an electrode manufactured by any method disclosed herein. Further disclosed herein, in certain instances, is a diode manufactured by any method disclosed herein.

Abstract: A semiconductor device includes a first well disposed in a substrate and including a first impurity of a first conductivity type, a second well disposed in the substrate, including a second impurity of a second conductivity type different from the first conductivity type, and having first to third portions, and a gate structure formed on the first well and the second well, wherein the second portion is disposed between the first portion and the third portion, the first portion and the third portion are formed deeper than the second portion, and concentration of the second impurity of the first portion and the third portion is greater than concentration of the second impurity of the second portion.

Abstract: A semiconductor device has reduced ON resistance (Ron) as well as a reduced electric field emanating from a current path. The semiconductor device includes a fin pattern, a gate electrode intersecting the fin pattern, a source region which has a first conductivity type and is disposed on one side of the gate electrode, a body region which has a second conductivity type, is situated within the fin pattern under the source region, and extends in a loop around the source region, a drain region which has the first conductivity type and is disposed on the other side of the gate electrode, a field dispersion region which has the second conductivity type and is situated within the fin pattern between the gate electrode and the drain region, and a drift region which has the first conductivity type, is situated within the fin pattern under the drain region and the field dispersion region, and extends in a loop around the drain region and the field dispersion region.

Abstract: The invention relates to a product and a process for fabricating a 1D, 2D, or 3D layered micro or nano component that comprises providing an electrode having a micro-scale or nano-scale tip, and applying electric current to the electrode tip in the presence of a micro-scale or nano-scale powder.

Abstract: A semiconductor device including an electrostatic discharge (ESD) protection circuit includes an input port, a logic circuit receiving an input signal applied to the input port and generating an output signal based on the input signal, and an ESD protection circuit adjusting a level of the input signal when the level of the input signal exceeds a predetermined range.

Abstract: A smart card may include data storage and transmission circuitry, a plurality of voltage controllers to supply operational power to card circuitry, a plurality of oscillators to supply an internal clock for the card, and power management circuitry. The power management circuitry may be configured to shut down the oscillators and at least one, but not all, voltage controllers during a period after a data transmission is completed.

Abstract: A smart card may include data storage and transmission circuitry, a plurality of voltage controllers to supply operational power to card circuitry, a plurality of oscillators to supply an internal clock for the card, and power management circuitry. The power management circuitry may be configured to shut down the oscillators and at least one, but not all, voltage controllers during a period after a data transmission is completed.

Abstract: A semiconductor device includes a first well disposed in a substrate and including a first impurity of a first conductivity type, a second well disposed in the substrate, including a second impurity of a second conductivity type different from the first conductivity type, and having first to third portions, and a gate structure formed on the first well and the second well, wherein the second portion is disposed between the first portion and the third portion, the first portion and the third portion are formed deeper than the second portion, and concentration of the second impurity of the first portion and the third portion is greater than concentration of the second impurity of the second portion.

Abstract: A system-on-chip (SoC) includes a slave intellectual property (IP) block, a master IP block, and an update control unit. The slave IP block is configured to perform first processing on first data based on first control information stored in a first storage unit. The master IP block is configured to perform second processing on second data in response to receiving a first processing result obtained by performing the first processing on the first data. Performing the second processing is based on second control information stored in a second storage unit. The update control unit is configured to determine an update time of the first control information or an update time of the second control information in response to performing the first processing and performing the second processing.