Patents by Inventor Kei Fujii
Kei Fujii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240144045Abstract: A computer performs a first step of acquiring initial structures that are atomic arrangement structures in a three-dimensional space which a composition of a material can take, a second step of calculating first energy corresponding to structurally optimized atomic arrangement structures by performing structure optimization on one or some initial structures, a third step of predicting second energy corresponding to atomic arrangement structures obtained in a case where structure optimization is performed on other initial structure(s) by using a prediction model for the other initial structure(s), a fourth step of extracting third energy indicative of a minimum value on the basis of the first energy and the second energy, and a fifth step of outputting the third energy, a first structure, which is an atomic arrangement structure corresponding to the third energy, or the third energy and the first structure.Type: ApplicationFiled: January 10, 2024Publication date: May 2, 2024Inventors: KEI AMII, MASAKI OKOSHI, MIKIYA FUJII
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Publication number: 20240144046Abstract: A computer performs a first step of acquiring initial structures that are atomic arrangement structures in a three-dimensional space which a composition of a material after desorption of an atom contained in the material can take, a second step of calculating first energy corresponding to structurally optimized atomic arrangement structures by performing structure optimization on one or some initial structures, a third step of predicting second energy corresponding to atomic arrangement structures obtained in a case where structure optimization is performed on other initial structure(s) by using a prediction model for the other initial structure(s), a fourth step of extracting third energy indicative of a minimum value on the basis of the first energy and the second energy, and a fifth step of outputting the third energy, a first structure, which is an atomic arrangement structure corresponding to the third energy, or the third energy and the first structure.Type: ApplicationFiled: January 10, 2024Publication date: May 2, 2024Inventors: KEI AMII, MASAKI OKOSHI, MIKIYA FUJII
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Publication number: 20240115719Abstract: Compounds or salts thereof represented by formula (I): wherein X indicates a leaving group, Y indicates an affinity peptide having a binding region in a CH2 domain in an immunoglobulin unit comprising two heavy chains and two light chains, M indicates a trivalent group linking the carbon atom in C?O adjacent to M and the carbon atom in C?W via a main chain portion consisting of 3 to 5 carbon atoms, O indicates an oxygen atom, S indicates a sulfur atom, W indicates an oxygen atom or a sulfur atom, N3 indicates an azide group, La indicates a bond or a divalent group, and Lb indicates a bond or a divalent group; and antibodies or salts thereof which can be prepared using such a compound or salt thereof, are useful for controlling the bonding ratio of an antibody and a modifying group within a desired range.Type: ApplicationFiled: September 8, 2023Publication date: April 11, 2024Applicant: Ajinomoto Co., Inc.Inventors: Tomohiro FUJII, Kei YAMADA, Yutaka MATSUDA, Ryusuke HIRAMA, Noriko HATADA, Naoko ARASHIDA
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Publication number: 20230036079Abstract: A vertical cavity surface-emitting laser configured to emit laser light having a wavelength of 830 nm to 910 nm includes a substrate having a main surface including GaAs, a first distributed Bragg reflector, an active layer, and a second distributed Bragg reflector. The substrate, the first distributed Bragg reflector, the active layer, and the second distributed Bragg reflector are arranged in a first axis direction intersecting the main surface. The main surface has an off angle of 6° or more with respect to a (100) plane. The active layer includes InxAlyGa1-x-yAs (0<x<1, 0?y<1). The active layer has a strain. An absolute value of the strain is 0.5% to 1.4%.Type: ApplicationFiled: July 8, 2022Publication date: February 2, 2023Applicant: Sumitomo Electric Industries, Ltd.Inventors: Takamichi SUMITOMO, Kei FUJII, Suguru ARIKATA, Takeshi AOKI, Susumu YOSHIMOTO
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Patent number: 10938181Abstract: A vertical cavity surface emitting laser includes: an active layer including a quantum well structure including one or more well layers including a III-V compound semiconductor containing indium as a group III constituent element; an upper laminated region containing a carbon dopant; and a substrate for mounting a post including the active layer and the upper laminated region, in which the active layer is provided between the upper laminated region and the substrate, the quantum well structure has a carbon concentration of 2×1016 cm?3 or less, and the upper laminated region includes a pile-up layer of indium at a position away from the active layer.Type: GrantFiled: August 29, 2019Date of Patent: March 2, 2021Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Kei Fujii, Takamichi Sumitomo, Suguru Arikata
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Patent number: 10594110Abstract: A vertical cavity surface emitting laser includes: a supporting base having a principal surface including III-V compound semiconductor containing gallium and arsenic as constituent elements; and a post disposed on the principal surface. The post has a lower spacer region including a III-V compound semiconductor containing gallium and arsenic as group-III elements, and an active layer having a quantum well structure disposed on the lower spacer region. The quantum well structure has a concentration of carbon in a range of 2×1016 cm?3 or more to 5×1016 cm?3 or less. The quantum well structure includes a well layer and a barrier layer. The well layer includes a III-V compound semiconductor containing indium as a group-III element, and the barrier layer includes a III-V compound semiconductor containing indium and aluminum as group-III elements. The lower spacer region is disposed between the supporting base and the active layer.Type: GrantFiled: November 13, 2018Date of Patent: March 17, 2020Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Kei Fujii, Toshiyuki Tanahashi, Takashi Ishizuka, Susumu Yoshimoto, Takamichi Sumitomo, Koji Nishizuka, Suguru Arikata
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Publication number: 20200076161Abstract: A vertical cavity surface emitting laser includes: an active layer including a quantum well structure including one or more well layers including a III-V compound semiconductor containing indium as a group III constituent element; an upper laminated region containing a carbon dopant; and a substrate for mounting a post including the active layer and the upper laminated region, in which the active layer is provided between the upper laminated region and the substrate, the quantum well structure has a carbon concentration of 2×1016 cm?3 or less, and the upper laminated region includes a pile-up layer of indium at a position away from the active layer.Type: ApplicationFiled: August 29, 2019Publication date: March 5, 2020Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Kei FUJII, Takamichi Sumitomo, Suguru Arikata
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Publication number: 20200028328Abstract: A vertical cavity surface emitting laser includes an active layer having a quantum well structure, a first laminate for a first distributed Bragg reflector, and a first spacer region provided between the active layer and the first laminate. A barrier layer of the quantum well structure includes a first compound semiconductor containing aluminum as a group m constituent element. The first spacer region includes a second compound semiconductor having a larger aluminum composition than the first compound semiconductor. A concentration of first dopant in the first laminate is larger than a concentration of the first dopant in the first portion of the first spacer region. The concentration of the first dopant in the first portion of the first spacer region is larger than a concentration of the first dopant in the second portion of the first spacer region.Type: ApplicationFiled: July 18, 2019Publication date: January 23, 2020Applicant: Sumitomo Electric Industries, LTD.Inventors: Suguru ARIKATA, Susumu YOSHIMOTO, Takamichi SUMITOMO, Kei FUJII
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Publication number: 20190148914Abstract: A vertical cavity surface emitting laser includes: a supporting base having a principal surface including III-V compound semiconductor containing gallium and arsenic as constituent elements; and a post disposed on the principal surface. The post has a lower spacer region including a III-V compound semiconductor containing gallium and arsenic as group-III elements, and an active layer having a quantum well structure disposed on the lower spacer region. The quantum well structure has a concentration of carbon in a range of 2×1016 cm?3 or more to 5×1016 cm?3 or less. The quantum well structure includes a well layer and a barrier layer. The well layer includes a III-V compound semiconductor containing indium as a group-III element, and the barrier layer includes a III-V compound semiconductor containing indium and aluminum as group-III elements. The lower spacer region is disposed between the supporting base and the active layer.Type: ApplicationFiled: November 13, 2018Publication date: May 16, 2019Applicant: Sumitomo Electric Industries, Ltd.Inventors: Kei Fujii, Toshiyuki Tanahashi, Takashi Ishizuka, Susumu Yoshimoto, Takamichi Sumitomo, Koji Nishizuka, Suguru Arikata
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Patent number: 9887310Abstract: A semiconductor layered structure includes a substrate formed of a III-V compound semiconductor, a buffer layer disposed on and in contact with the substrate and formed of a III-V compound semiconductor, and a quantum well layer disposed on and in contact with the buffer layer and including a plurality of component layers formed of III-V compound semiconductors. The substrate has a diameter of 55 mm or more. At least one of the component layers is formed of a mixed crystal of three or more elements. When the compound semiconductor forming the substrate has a lattice constant d1, the compound semiconductor forming the buffer layer has a lattice constant d2, and the compound semiconductors forming the quantum well layer have an average lattice constant d3, (d2?d1)/d1 is ?3×10?3 or more and 3×10?3 or less, and (d3?d1)/d1 is ?3×10?3 or more and 3×10?3 or less.Type: GrantFiled: January 19, 2015Date of Patent: February 6, 2018Assignee: Sumitomo Electric Industries, Ltd.Inventors: Katsushi Akita, Kei Fujii, Takashi Kyono, Koji Nishizuka, Kaoru Shibata
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Patent number: 9818895Abstract: Provided are a semiconductor device and an optical sensor device, each having reduced dark current, and detectivity extended toward longer wavelengths in the near-infrared. Further, a method for manufacturing the semiconductor device is provided. The semiconductor device 50 includes an absorption layer 3 of a type II (GaAsSb/InGaAs) MQW structure located on an InP substrate 1, and an InP contact layer 5 located on the MQW structure. In the MQW structure, a composition x (%) of GaAsSb is not smaller than 44%, a thickness z (nm) thereof is not smaller than 3 nm, and z??0.4x+24.6 is satisfied.Type: GrantFiled: April 23, 2015Date of Patent: November 14, 2017Assignee: Sumitomo Electric Industries, Ltd.Inventors: Kei Fujii, Katsushi Akita, Takashi Ishizuka, Hideaki Nakahata, Yasuhiro Iguchi, Hiroshi Inada, Youichi Nagai
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Patent number: 9773932Abstract: An epitaxial wafer which allows manufacture of a photodiode having suppressed dark current and ensured sensitivity, and a method for manufacturing the epitaxial wafer, are provided. The epitaxial wafer of the present invention includes: a III-V semiconductor substrate; and a multiple quantum well structure disposed on the substrate, and including a plurality of pairs of a first layer and a second layer. The total concentration of elements contained as impurities in the multiple quantum well structure is less than or equal to 5×1015 cm?3.Type: GrantFiled: August 18, 2014Date of Patent: September 26, 2017Assignee: Sumitomo Electric Industries, Ltd.Inventors: Kei Fujii, Koji Nishizuka, Takashi Kyono, Kaoru Shibata, Katsushi Akita
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Patent number: 9698287Abstract: An epitaxial wafer of the present invention includes a substrate composed of a III-V compound semiconductor, a multiple quantum well structure composed of a III-V compound semiconductor and located on the substrate, and a top layer composed of a III-V compound semiconductor and located on the multiple quantum well structure. The substrate has a plane orientation of (100) and an off angle of ?0.030° or more and +0.030° or less, and a surface of the top layer has a root-mean-square roughness of less than 10 nm.Type: GrantFiled: April 23, 2014Date of Patent: July 4, 2017Assignee: Sumitomo Electric Industries, Ltd.Inventors: Kei Fujii, Kaoru Shibata, Katsushi Akita
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Patent number: 9680040Abstract: A semiconductor device and the like having high quantum efficiency or high sensitivity in a near-infrared to infrared region is provided. The semiconductor device includes: a substrate; a multiple quantum well structure disposed on the substrate, and including a plurality of pairs of a layer a and a layer b; and a crystal-adjusting layer disposed between the substrate and the multiple quantum well structure. The crystal-adjusting layer includes a first adjusting layer which is made of the same material as the substrate and is in contact with the substrate, and a second adjusting layer which is made of the same material as the layer a or the layer b of the multiple quantum well structure and is in contact with the multiple quantum well structure.Type: GrantFiled: April 16, 2014Date of Patent: June 13, 2017Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Kaoru Shibata, Katsushi Akita, Kei Fujii, Takashi Ishizuka
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Patent number: 9608148Abstract: A method for producing a semiconductor element includes a step of forming a multiple quantum well in which a GaSb layer and an InAs layer are alternately stacked on a GaSb substrate by MOVPE, wherein, in the step of forming a multiple quantum well, an InSb film is formed on at least one of a lower-surface side and an upper-surface side of the InAs layer so as to be in contact with the InAs layer.Type: GrantFiled: February 5, 2015Date of Patent: March 28, 2017Assignee: Sumitomo Electric Industries, Ltd.Inventors: Takashi Kyono, Kei Fujii, Katsushi Akita
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Publication number: 20160380137Abstract: A light-receiving device includes: a group III-V compound semiconductor substrate having a first main surface; and a light-receiving layer formed on the first main surface, and the group III-V compound semiconductor substrate has a dislocation density of 10000 cm?2 or less. Accordingly, the light-receiving device with low dark current is provided.Type: ApplicationFiled: September 3, 2014Publication date: December 29, 2016Inventors: Kaoru SHIBATA, Kei FUJII, Takashi KYONO, Koji NISHIZUKA, Katsushi AKITA
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Publication number: 20160351742Abstract: A semiconductor layered structure includes a substrate formed of a III-V compound semiconductor, a buffer layer disposed on and in contact with the substrate and formed of a III-V compound semiconductor, and a quantum well layer disposed on and in contact with the buffer layer and including a plurality of component layers formed of III-V compound semiconductors. The substrate has a diameter of 55 mm or more. At least one of the component layers is formed of a mixed crystal of three or more elements. When the compound semiconductor forming the substrate has a lattice constant d1, the compound semiconductor forming the buffer layer has a lattice constant d2, and the compound semiconductors forming the quantum well layer have an average lattice constant d3, (d2?d1)/d1 is ?3×10?3 or more and 3×10?3 or less, and (d3?d1)/d1 is ?3×10?3 or more and 3×10?3 or less.Type: ApplicationFiled: January 19, 2015Publication date: December 1, 2016Inventors: Katsushi Akita, Kei Fujii, Takashi Kyono, Koji Nishizuka, Kaoru Shibata
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Publication number: 20160247951Abstract: An epitaxial wafer which allows manufacture of a photodiode having suppressed dark current and ensured sensitivity, and a method for manufacturing the epitaxial wafer, are provided. The epitaxial wafer of the present invention includes: a III-V semiconductor substrate; and a multiple quantum well structure disposed on the substrate, and including a plurality of pairs of a first layer and a second layer. The total concentration of elements contained as impurities in the multiple quantum well structure is less than or equal to 5×1015 cm?3.Type: ApplicationFiled: August 18, 2014Publication date: August 25, 2016Applicant: Sumitomo Electric Industries, Ltd.Inventors: Kei Fujii, Koji Nishizuka, Takashi Kyono, Kaoru Shibata, Katsushi Akita
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Publication number: 20160056315Abstract: A semiconductor device and the like having high quantum efficiency or high sensitivity in a near-infrared to infrared region is provided. The semiconductor device includes: a substrate; a multiple quantum well structure disposed on the substrate, and including a plurality of pairs of a layer a and a layer b; and a crystal-adjusting layer disposed between the substrate and the multiple quantum well structure. The crystal-adjusting layer includes a first adjusting layer which is made of the same material as the substrate and is in contact with the substrate, and a second adjusting layer which is made of the same material as the layer a or the layer b of the multiple quantum well structure and is in contact with the multiple quantum well structure.Type: ApplicationFiled: April 16, 2014Publication date: February 25, 2016Inventors: Kaoru SHIBATA, Katsushi AKITA, Kei FUJII, Takashi ISHIZUKA
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Patent number: 9190544Abstract: A photodiode and the like capable of preventing the responsivity on the short wavelength side from deteriorating while totally improving the responsivity in a type II MQW structure, is provided. The photodiode is formed on a group III-V compound semiconductor substrate, and includes a pixel. The photodiode includes an absorption layer of a type II MQW structure, which is located on the substrate. The MQW structure includes fifty or more pairs of two different types of group III-V compound semiconductor layers. The thickness of one of the two different types of group III-V compound semiconductor layers, which layer has a higher potential of a valence band, is thinner than the thickness of the other layer.Type: GrantFiled: September 28, 2011Date of Patent: November 17, 2015Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Kei Fujii, Takashi Ishizuka, Katsushi Akita, Yasuhiro Iguchi, Hiroshi Inada, Youichi Nagai