Abstract: A negative resistance circuit having a transistor and a plurality of distributed constant lines respectively connected to the three terminals of the transistor further comprises an inductive element or a capacitive element connected between the output terminal of the negative resistance circuit and the ground potential. The negative resistance is adjusted through the inductance of the inductive element or the capacitance of the capacitive element.

Abstract: A conductive layer is formed on each of the upper and lower surfaces of a dielectric substrate, and the two conductive layers are connected by rows of via-holes that are formed which a spacing that is less than or equal to ½ of the wavelength in the dielectric substrate in the resonance frequency, whereby n stages of dielectric resonators and input/output waveguide structures are formed. If the number n of stages is assumed to be 3, the first-stage resonator and the second-stage resonator are coupled by an electromagnetic field by means of via-holes of a first spacing; the second-stage resonator and the third-stage resonator are coupled by an electromagnetic by means of via-holes of a second spacing, whereby a filter is formed. The input/output waveguide structure and the filter are coupled by an electromagnetic by means of via-holes of a fourth spacing. The first-stage resonator and the third-stage resonator are coupled by an electromagnetic field by means of via-holes of a third spacing.

Abstract: A high frequency circuit substrate comprises a first high frequency circuit substrate including at least a first dielectric material layer, a first conductor layer, a second dielectric material layer and a second conductor layer, which are laminated in the named order, the first conductor layer having a first slot formed therein, and the second conductor layer forming a transmission line, the first dielectric material layer having a first opening exposing the first slot at its bottom. The high frequency circuit substrate also comprises a second high frequency circuit substrate including at least a third dielectric material layer, a third conductor layer, a fourth dielectric material layer and a fourth conductor layer, which are laminated in the named order, the third conductor layer having a second slot formed therein, and the fourth conductor layer forming a transmission line, the third dielectric material layer having a second opening exposing the second slot at its bottom.

Abstract: An RF package includes a multilayered dielectric substrate, a feed-through, and metal members. First and second dielectric substrates are formed on the multilayered dielectric substrate. The multilayered dielectric substrate has a cavity where a semiconductor element is to be mounted. The feed-through connects the inside and outside of the cavity and is comprised of a coplanar line formed on the first dielectric substrate and an inner layer line obtained by forming the second dielectric substrate on the coplanar line. The coplanar line and the inner layer line share a strip-like signal conductor. The metal members are formed at a connection interface between the coplanar line and the inner layer line on two sides of the signal conductor.

Abstract: A multi-layer substrate comprises a first dielectric layer, a coplanar waveguide line formed on a first surface of the first dielectric layer, the coplanar waveguide line including a signal conductor and a pair of ground conductor layers positioned at opposite sides of the signal conductor, separately from the signal conductor, and a second dielectric layer formed to cover the coplanar waveguide line and the first dielectric layer and having an opening positioned at least on the signal conductor of the coplanar waveguide line. A thickness of the first dielectric layer is smaller than the value of c/{4f·(∈1−1)½}, where c is velocity of light, f is a frequency of a signal propagating in the signal line, and ∈1 is a dielectric constant of the first dielectric layer.

Abstract: The present invention provides a filter exhibiting excellent filter characteristics and having less number of stages. A dielectric substrate (1) has one surface connected to a top conductor (2) and an opposite surface connected to a bottom conductor (3). A pair of rows of via-holes connecting together the top conductor (2) and the bottom conductor (3) are formed along the signal transfer direction. A slit (6) is formed in a portion of the top conductor (2) overlying the central resonator among a plurality of resonators. The slit (6) extends in a direction perpendicular to the signal transfer direction. Slits (7, 8) are formed in each of portions of the top conductor (2) overlying resonators disposed at both ends. A coplanar waveguide (9) mounted on the top conductor (2) is connected to the slit (7).

Abstract: A dielectric waveguide tube band-pass filter assuming lower characteristic change upon mounting, and having smaller dimensions and lower loss. Conductor layers (2a, 2c) are formed on the top and bottom surfaces of a dielectric substrate (1), wherein the top conductor layer 2a and the bottom conductor layer 2c are connected together through via-holes (3a). The via-holes (3a) are formed in at least two rows along the signal transfer direction. In the dielectric waveguide tube configured by the top and bottom conductor layers (2a, 2c) and the via-holes (3a), via-holes (3b) are arranged in the signal transfer direction at spacing equal to or below ½ of the in-tube wavelength to thereby configure resonators. The dielectric band-pass filter is configured by coupling adjacent resonators together through the via-holes (3b) configuring inductive windows.

Abstract: The present invention provides a transmission line structure comprising: a dielectric substrate having first and second surfaces; a signal conductive layer selectively provided on the first surface of the dialectic substrate for signal transmission; at least a first non-signal conductive layer being selectively provided on the first surface of the dialectic substrate, and the at least first non-signal conductive layer being separated from the signal conductive layer; and a second non-signal conductive layer being provided on the second surface of the dialectic substrate, wherein the dielectric substrate has at least a conductive region extending in contact with only one of the at least first non-signal conductive layer and the second non-signal conductive layer so that the at least conductive region is separated by the dielectric substrate from remaining one of the first non-signal conductive layers and the second non-signal conductive layer in view of a vertical direction to the first and second surfaces of

Abstract: A high frequency circuit substrate comprises a first high frequency circuit substrate including at least a first dielectric material layer, a first conductor layer, a second dielectric material layer and a second conductor layer, which are laminated in the named order, the first conductor layer having a first slot formed therein, and the second conductor layer forming a transmission line, the first dielectric material layer having a first opening exposing the first slot at its bottom. The high frequency circuit substrate also comprises a second high frequency circuit substrate including at least a third dielectric material layer, a third conductor layer, a fourth dielectric material layer and a fourth conductor layer, which are laminated in the named order, the third conductor layer having a second slot formed therein, and the fourth conductor layer forming a transmission line, the third dielectric material layer having a second opening exposing the second slot at its bottom.

Abstract: A substrate-type non-reciprocal circuit element comprises a substrate, a ferrite embedded in the substrate, a central electrode formed on the ferrite at one principal surface of the substrate, a plurality of signal conductors formed on the one principal surface of the substrate to extend from the central electrode into a plurality of different outward directions, a first ground electrode formed on the one principal surface of the substrate, separately from the central electrode and the plurality of signal conductors, and a second ground electrode formed on the other principal surface of the substrate and electrically connected to the first ground electrode. Thus, the substrate-type non-reciprocal circuit element can be easily electrically connected to a measurement machine, to enable to precisely and easily measure an electrical characteristics with a good repeatability.

Abstract: Circuits having active devices, a pattern for a circulator or isolator, and ferrite are formed on a semiconductor microwave-millimeter wave circuit substrate. The ferrite is embedded in a dielectric substrate. The dielectric substrate is oppositely aligned with the semiconductor microwave-millimeter wave circuit substrate having the pattern for the circulator or the like. Thus, the pattern is coupled with the ferrite so as to structure the circulator or isolator.

Abstract: The present invention provides a microwave and millimeter wave circuit apparatus having a reduced size and which can be produced easily, improving productivity. The microwave and millimeter wave circuit apparatus includes: a grounding conductive layer 4 grounded; a first dielectric layer 5 formed on this grounding conductive layer 4; a signal line selectively formed on this first dielectric layer 5; a second dielectric layer 7 covering at least a portion of the signal line 6; a cavity 2 formed in this second dielectric layer 7 and extending to the signal line 6; a monolithic microwave integrated circuit 1 arranged in the cavity 2 and connected to the signal line 6; and an antenna connected to the signal line 6.

Abstract: A substrate-type non-reciprocal circuit element comprises a substrate, a ferrite embedded in the substrate, a central electrode formed on the ferrite at one principal surface of the substrate, a plurality of signal conductors formed on the one principal surface of the substrate to extend from the central electrode into a plurality of different outward directions, a first ground electrode formed on the one principal surface of the substrate, separately from the central electrode and the plurality of signal conductors, and a second ground electrode formed on the other principal surface of the substrate and electrically connected to the first ground electrode. Thus, the substrate-type non-reciprocal circuit element can be easily electrically connected to a measurement machine, to enable to precisely and easily measure an electrical characteristics with a good repeatability.

Abstract: A semiconductor device comprising a first semiconductor layer, a second semiconductor layer on the first layer, a source electrode and a drain electrode both in contact with the first layer, and a hole or electron injection electrode and a gate electrode both formed on the second layer; wherein the second semiconductor is one that has an electron affinity smaller than the first semiconductor when holes are injected or has a sum of an electron affinity and a band gap greater than the first semiconductor when electrons are injected; and wherein the injection electrode and the gate electrode are placed between the source electrode and the drain electrode in this order. In such device, the current driving capability can easily be increased by controlling the injection amount of holes or electrons and the current modulation can easily be controlled by a small capacitance gate electrode; and so operation at an extra-high frequency and an extra-high speed becomes possible.

Abstract: For improvement in a transit time of electrons, there is disclosed a heterojunction field effect transistor fabricated on a semi-insulating GaAs substrate, comprising a first layer overlying the semi-insulating substrate and formed of a high-purity GaAs, a second layer overlying the first layer and formed of an n-type AlGaAs which is smaller in electron affinity than the high-purity GaAs, a source region penetrating from the first layer into the second layer so as to be in contact with the active channel layer formed in the first layer and formed of an gallium-rich AlGaAs, a drain region, and a gate electrode formed on the second layer, an energy gap takes place between the source region and the first layer due to a lower edge of the conduction band thereof higher in energy level than that of the high-purity GaAs, thereby accelerating electrons supplied from the source region to the active channel layer.

Abstract: A method of selective epitaxial growth includes a step of selectively forming an insulator film on a predetermined region of a semiconductor substrate and a step of evaporating a starting material containing a Group III element in vacuum in the presence of a Group V element to grow epitaxially a III-V compound semiconductor selectively on the semiconductor substrate under the condition where the partial pressure of the Group III element just above the semiconductor substrate is greater than the equilibrium vapor pressure of the Group III element contained in the III-V compound semiconductor existing on the semiconductor substrate and is smaller than the equilibrium vapor pressure of the Group III element contained in the III-V compound semiconductor existing on the insulator film.When InAs is grown epitaxially and selectively on a GaAs substrate, the GaAs substrate is kept at 500.degree. to 650.degree. C.

Abstract: A heterojunction transistor has a first semiconductor layer of a semi-insulating or a low impurity concentration, a second semiconductor layer formed on the first semiconductor layer and made of such a semiconductor material that, in cooperation with the first semiconductor layer, a first energy recess for electrons and a second energy recess for holes are respectively formed at the bottom of the conduction band and at the top of the valence band to constitute a conductive channel, a third semiconductor layer formed on the second semiconductor layer and forming a PN-junction with the upper surface of the second semiconductor layer to inject carriers into the conductive channel, a control electrode for applying an input signal to the third semiconductor layer, and a ground and an output electrode formed on the second semiconductor layer on the opposite sides of the third semiconductor layer.

Abstract: For improvement in a transit time of electrons, there is disclosed a heterojunction field effect transistor fabricated on a semi-insulating GaAs substrate, comprising a first layer overlying the semi-insulating substrate and formed of a high-purity GaAs, a second layer overlying the first layer and formed of an n-type AlGaAs which is smaller in electron affinity than the high-purity GaAs, a source region penetrating from the first layer into the second layer so as to be in contact with the active channel layer formed in the first layer and formed of an gallium-rich AlGaAs, a drain region, and a gate electrode formed on the second layer, an energy gap takes place between the source region and the first layer due to a lower edge of the conduction band thereof higher in energy level than that of the high-purity GaAs, thereby accelerating electrons supplied from the source region to the active channel layer.

Abstract: A high speed and high power transistor includes a first layer of a first semiconductor material, a second layer of a second semiconductor material formed on the first layer, the second semiconductor material having a smaller electron affinity than the first semiconductor material, first and second electrode positioned ends of the second layer, respectively, in contact with the first layer, and a control electrode formed on the second layer between the first and second electrodes, the control electrode injecting holes into the second layer in accordance with an input signal to induce an electron channel between the first and second electrodes.

Abstract: For improvement in gate leakage current, there is disclosed a hetero-MIS gate type field effect transistor comprising (a) an indium-phosphide semi-insulating substrate, (b) an indium-phosphide active layer formed on a surface of the semi-insulating substrate, (c) an aluminum-gallium-arsenide layer formed on a surface of the indium-phosphide active layer, (d) a metal gate electrode formed on the aluminum-gallium-arsenide layer, and (e) source and drain electrodes formed on the indium-phosphide active layer and located at the both sides of the metal gate electrode, and the aluminum-gallium-arsenide layer has the highest aluminum atom composition at the upper surface portion contacting the metal gate electrode and the lowest aluminum atom composition at the lower surface portion contacting the indium-phosphide active layer, so that a discontinuity takes place between the indium-phosphide active layer and the aluminum-gallium-arsenide layer and a higher Schottky barrier is provided between the aluminum-gallium-ar