Patents by Inventor Keiji Hamoda

Keiji Hamoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9671818
    Abstract: According to one embodiment, a memory controller sends a periodic control signal from a first terminal on a non-volatile memory side to the non-volatile memory, and the control signal includes a data strobe signal, a write enable signal, and a read enable signal.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: June 6, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideo Katayose, Keiji Hamoda
  • Publication number: 20170077020
    Abstract: According to one embodiment, there is provided a semiconductor device including a package. The package includes a first terminal, a second terminal, a semiconductor chip, and a sealing member. The first terminal is compatible with a first bus standard. The second terminal is compatible with a second bus standard. In the semiconductor chip, the first terminal and the second terminal are electrically connected. The sealing member covers one end of the first terminal and one end of the second terminal, exposes an other end of the first terminal and an other end of the second terminal, and covers the semiconductor chip.
    Type: Application
    Filed: December 22, 2015
    Publication date: March 16, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hide MABUCHI, Keiji HAMODA, Kazumichi HADA
  • Publication number: 20150262665
    Abstract: According to one embodiment, a memory controller sends a periodic control signal from a first terminal on a non-volatile memory side to the non-volatile memory, and the control signal includes a data strobe signal, a write enable signal, and a read enable signal.
    Type: Application
    Filed: September 10, 2014
    Publication date: September 17, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideo KATAYOSE, Keiji Hamoda
  • Patent number: 5469308
    Abstract: A cassette convey means can carry a plurality of cassettes, and can selectively convey and mount a cassette to a cassette driving section, or can externally feed the mounted cassette. A cassette selection/setting means outputs designation data for selecting and designating one of the cassettes. An operation mode input means outputs an operation signal including cassette subsidiary information such as a timer setting instruction or remaining amount display data for the cassette designated by the cassette selection setting means, or a tape driving instruction. A cassette information storage means stores information of each of the plurality of cassettes. A system controller checks conditions of pieces of input information from the above-mentioned means, selects an optimal cassette according to a purpose, and controls the cassette convey means to mount the selected cassette on the tape driving section.
    Type: Grant
    Filed: August 15, 1994
    Date of Patent: November 21, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Keiji Hamoda, Ritsuo Yoshida, Toshihiko Iijima, Chiemi Yamamoto, Akihiko Kubo
  • Patent number: 5343450
    Abstract: A timer operation management apparatus for managing the playback and recording of multiple video tape cassettes comprising cassette information storage capabilities for storing the presence/absence of cassette, the presence/absence of a safety lug, and the like; timer information capabilities capable of storing cassette designation information, start and stop time designations, record and play time designations, etc.; and wherein the cassette designation information includes both individual cassette designation information and all cassette designation information.
    Type: Grant
    Filed: February 28, 1992
    Date of Patent: August 30, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Keiji Hamoda, Jun Yoshikawa, Takeo Yamada, Isamu Odane, Masahiro Ito, Yoshimasa Noudan, Hideo Kunii, Hirofumi Kanai, Masashi Yasuzato
  • Patent number: 4989112
    Abstract: A tape cassette type detection apparatus has a tape transit control circuit which supplies a first control signal to a supply reel motor and a take-up reel motor and a second control signal thereto at timing delayed from the first control signal by a predetermined period of time to move a tape wound around a supply reel and a take-up reel in a predetermined direction during a predetermined period. Upon rotation of the supply and take-up reels, pulses are generated by pulse generators in response to the first and second control signals, and are counted by reel counters for periods set by measurement control circuits. Thereafter, the count values are supplied to a rotation ratio calculation circuit as first movement speed data. A pulse generator detects rotation of a capstan for moving the tape and generates pulses. The pulses generated by the pulse generator are counted by capstan counters.
    Type: Grant
    Filed: December 20, 1988
    Date of Patent: January 29, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keiji Hamoda