Patents by Inventor Keiji Kuroda

Keiji Kuroda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240133068
    Abstract: The method includes: placing a substrate on a mount base; covering the substrate with the screen mask including a penetrating portion of a predetermined pattern; pressing the substrate by the electrolyte membrane with a fluid pressure of a plating solution contacting the electrolyte membrane via the screen mask; and applying a voltage between an anode contacting the plating solution and the substrate so as to allow metal ions contained in the plating solution to pass through the electrolyte membrane and form a metal film derived from the metal ions in the predetermined pattern on the substrate. The substrate includes an outer edge portion formed by an opposite surface facing the screen mask and a side surface. A cushion member is disposed along the outer edge portion before pressing the substrate.
    Type: Application
    Filed: August 27, 2023
    Publication date: April 25, 2024
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Haruki KONDOH, Keiji KURODA, Koji INAGAKI
  • Publication number: 20240133069
    Abstract: The film forming apparatus includes a pressing mechanism that presses the mask structure by the electrolyte membrane with a fluid pressure of a plating solution. The mask structure includes a screen mask in which a penetrating portion corresponding to a predetermined pattern is formed, and a frame that supports a peripheral edge of the screen mask on a side adjacent to the substrate. In the frame, an inner covering portion made of an elastic material softer than a material of the frame is formed along an opening edge contacting the electrolyte membrane.
    Type: Application
    Filed: August 27, 2023
    Publication date: April 25, 2024
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Haruki KONDOH, Keiji KURODA, Koji INAGAKI
  • Publication number: 20240133070
    Abstract: A mask structure includes a screen mask having a penetrating portion with a predetermined pattern. The screen mask includes a mesh portion having an opening formed in a grid pattern, and a mask portion having the penetrating portion and being fixed to the mesh portion so as to face the substrate. The mask portion includes a core portion that retains the shape of the mask portion, and a seal portion made of an elastic material softer than the material of the core portion and contacting the substrate.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 25, 2024
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Haruki KONDOH, Keiji KURODA, Koji INAGAKI, Kazuaki OKAMOTO, Hiroshi YANAGIMOTO
  • Publication number: 20240066865
    Abstract: A liquid discharge head includes a nozzle layer having a nozzle through which a liquid is discharged from a second side toward a first side, a liquid chamber substrate, and a drive circuit. The nozzle layer includes a vibration layer, a piezoelectric actuator adjacent to the nozzle and over the first side, a circuit connection over the first side, a first protective layer around the circuit connection, a second protective layer over the piezoelectric actuator, a first water-resistant film over the first protective layer, and a second water-resistant film over the second protective layer. The second protective layer is separated from the first protective layer. The first protective layer defines an opening above the circuit connection. The liquid chamber substrate has a liquid chamber communicating with the nozzle. The drive circuit is disposed over the second side and connected to the circuit connection to drive the piezoelectric actuator.
    Type: Application
    Filed: January 19, 2022
    Publication date: February 29, 2024
    Inventors: Keiji UEDA, Takahiko KURODA, Toshiaki MASUDA, Kaname MORITA
  • Patent number: 11913129
    Abstract: It is determined whether an imaginary component at a predetermined frequency of an alternating current impedance is equal to or more than a preliminarily set film-formable value or not. The metallic coating is formed in a state where the substrate is pressed by the solid electrolyte membrane when the imaginary component is equal to or more than the film-formable value in the determining. The metallic coating is formed in a state where the pressing of the substrate by the solid electrolyte membrane is released to separate the solid electrolyte membrane from the substrate, the solid electrolyte membrane is re-tensioned with a constant tensile force, and subsequently, the substrate is pressed by the re-tensioned solid electrolyte membrane when the imaginary component is smaller than the film-formable value in the determining.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: February 27, 2024
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Haruki Kondoh, Akira Kato, Kazuaki Okamoto, Keiji Kuroda
  • Patent number: 11903141
    Abstract: A method for manufacturing a wiring board in which the adhesion between an underlayer and a seed layer is improved. A diffusion layer in which an element forming the underlayer and an element forming a coating layer are mutually diffused is formed between the underlayer and a wiring portion of the coating layer by irradiating the wiring portion with a laser beam. A seed layer is formed by removing a portion excluding the wiring portion of the coating layer from the underlayer. A metal layer is formed by disposing a solid electrolyte membrane between an anode and the seed layer and applying voltage between the anode and the underlayer. An exposed portion without the seed layer of the underlayer is removed from an insulating substrate.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: February 13, 2024
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Keiji Kuroda, Rentaro Mori, Hiroshi Yanagimoto, Haruki Kondoh, Kazuaki Okamoto, Akira Kato
  • Publication number: 20230328898
    Abstract: Provided is a new board with a sufficient adhesion strength between an insulating layer and a metal layer. A board of the embodiment is a board including an insulating layer and a metal layer. The insulating layer contains a resin containing an insulating filler. The metal layer is disposed on a surface of the insulating layer. The resin is present partially between at least a part of the insulating filler present in the surface of the insulating layer and a metal constituting the metal layer. In an interface between the insulating layer and the metal layer, a depth of the metal present at a deepest portion in the insulating layer is 1.2 µm or less based on the resin or the insulating filler present in an outermost surface of the insulating layer.
    Type: Application
    Filed: January 23, 2023
    Publication date: October 12, 2023
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Miwako SHIONOYA, Satoko INUZUKA, Rentaro MORI, Keiji KURODA
  • Patent number: 11785721
    Abstract: First, a patterned substrate including an insulating substrate, a conductive seed layer, and an insulating layer is prepared. The seed layer is disposed on the insulating substrate, and consists of a first part having a predetermined pattern corresponding to the wiring pattern and a second part as a part other than the first part. The insulating layer is disposed on the second part of the seed layer. Subsequently, a metal layer having a thickness larger than a thickness of the insulating layer is formed on the first part of the seed layer. Here, a voltage is applied between an anode and the seed layer while a resin film containing a metal ion-containing solution is disposed between the patterned substrate and the anode and the resin film and the seed layer are brought into pressure contact. Subsequently, the insulating layer and the second part of the seed layer are removed.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: October 10, 2023
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Haruki Kondoh, Rentaro Mori, Keiji Kuroda, Kazuaki Okamoto, Akira Kato, Jyunya Murai, Hiroshi Yanagimoto, Kenji Nakamura, Tomoya Okazaki
  • Publication number: 20230302578
    Abstract: Provided is a method for manufacturing a board with a roughened surface and a method for manufacturing a board having a plated layer that allow easily manufacturing the board having a plated layer. One of embodiments is a method for manufacturing a board with a surface roughened for wiring formation. The method for manufacturing a board includes performing laser ablation on a board containing a resin at least on a surface of the board. A laser light irradiated in the laser ablation is a laser light having a pulse width of 1 ps or less, a wavelength of 320 nm or more, and an output of 1 W or less.
    Type: Application
    Filed: January 26, 2023
    Publication date: September 28, 2023
    Inventors: Hiroshi YANAGIMOTO, Oji KUNO, Jyunya MURAI, Keiji KURODA, Tomoya OKAZAKI, Rentaro MORI
  • Patent number: 11700686
    Abstract: A method for manufacturing a wiring board capable of improving adhesion between an underlayer and a seed layer. An electrically conductive underlayer is disposed on the surface of an insulating substrate and a seed layer containing metal is disposed on the surface of the underlayer to prepare a substrate with seed-layer. A diffusion layer in which elements forming the underlayer and seed layer are mutually diffused is formed between the underlayer and the seed layer, by irradiating the seed layer with a laser beam. A metal layer is formed on the surface of the seed layer by disposing a solid electrolyte membrane between an anode and the seed layer as a cathode and applying voltage between the anode and the underlayer. An exposed portion without the seed layer of the underlayer is removed from the insulating substrate.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: July 11, 2023
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Keiji Kuroda, Haruki Kondoh, Kazuaki Okamoto, Rentaro Mori, Hiroshi Yanagimoto
  • Patent number: 11696410
    Abstract: The present disclosure provides a method for producing a wiring substrate. A seeded substrate is first prepared. The seeded substrate includes an insulation substrate, a conductive undercoat layer having a hydrophilic surface and provided on the insulation substrate, a conductive seed layer provided on a first region of the surface of the undercoat layer, the first region having a predetermined pattern, and a water-repellent layer on the second region of the surface of the undercoat layer, the second region being a region other than the first region. Subsequently, a metal layer is formed on the seed layer. A voltage is applied between the anode and the seed layer while a solid electrolyte membrane being disposed between the seeded substrate and the anode, and the solid electrolyte membrane and the seed layer being pressed into contact with each other. Thereafter, the water-repellent layer and the undercoat layer are etched.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: July 4, 2023
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Haruki Kondoh, Rentaro Mori, Hiroshi Yanagimoto, Keiji Kuroda, Kazuaki Okamoto
  • Patent number: 11665829
    Abstract: A method for manufacturing a wiring board is capable of forming a metal layer included in a wiring layer to have an even thickness. The method includes preparing a conductive first underlayer on a surface of a substrate; a conductive second underlayer on a surface of the first underlayer; and a seed layer on a surface of the second underlayer and containing metal. The method disposes a solid electrolyte membrane between an anode and the seed layer as a cathode; applies voltage between the anode and the first underlayer to form a metal layer on the surface of the seed layer; removes an exposed portion of the second underlayer without the seed layer from the substrate; and removes an exposed portion of the first underlayer without the seed layer from the substrate. The first underlayer is a material having a higher electrical conductivity than that of the second underlayer.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: May 30, 2023
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Haruki Kondoh, Rentaro Mori, Keiji Kuroda, Hiroshi Yanagimoto, Kazuaki Okamoto
  • Publication number: 20230124546
    Abstract: A film formation apparatus includes an anode, a solid electrolyte membrane between the anode and a substrate, a power supply that applies voltage between the anode and the substrate as a cathode, and a liquid reservoir that holds the anode and the solid electrolyte membrane while separating them apart from each other, the liquid reservoir storing electrolyte solution including metal ions between the anode and the solid electrolyte membrane. The solid electrolyte membrane includes a central portion that comes in contact with the substrate and the electrolyte solution, and an outer edge portion outside the central portion. The apparatus includes a membrane tensioning mechanism to apply a tensile force to the central portion toward the outer edge portion while storing the heated electrolyte solution in the liquid reservoir, to elongate the central portion.
    Type: Application
    Filed: September 14, 2022
    Publication date: April 20, 2023
    Inventors: Haruki KONDOH, Koji INAGAKI, Keiji KURODA, Kazuaki OKAMOTO
  • Publication number: 20220272847
    Abstract: First, a patterned substrate including an insulating substrate, a conductive seed layer, and an insulating layer is prepared. The seed layer is disposed on the insulating substrate, and consists of a first part having a predetermined pattern corresponding to the wiring pattern and a second part as a part other than the first part. The insulating layer is disposed on the second part of the seed layer. Subsequently, a metal layer having a thickness larger than a thickness of the insulating layer is formed on the first part of the seed layer. Here, a voltage is applied between an anode and the seed layer while a resin film containing a metal ion-containing solution is disposed between the patterned substrate and the anode and the resin film and the seed layer are brought into pressure contact. Subsequently, the insulating layer and the second part of the seed layer are removed.
    Type: Application
    Filed: February 15, 2022
    Publication date: August 25, 2022
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Haruki KONDOH, Rentaro MORI, Keiji KURODA, Kazuaki OKAMOTO, Akira KATO, Jyunya MURAI, Hiroshi YANAGIMOTO, Kenji NAKAMURA, Tomoya OKAZAKI
  • Patent number: 11425824
    Abstract: A seeded substrate is first prepared. The seeded substrate includes an insulation substrate having a main surface composed of a first region and a second region other than the first region, and a conductive seed layer provided on the first region. Subsequently, a conductive layer is formed on at least the second region to obtain a first treated substrate. An insulation layer is then formed on the first treated substrate. The seed layer is then exposed. A metal layer is then formed on the surface of the seed layer. Here, a voltage is applied between the anode and the seed layer while a solid electrolyte membrane containing a metal ion-containing solution being disposed between the second treated substrate and the anode, and the solid electrolyte membrane and the seed layer being pressed into contact with each other. Thereafter, the insulation layer and the conductive layer are removed.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: August 23, 2022
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Keiji Kuroda, Haruki Kondoh, Kazuaki Okamoto, Rentaro Mori, Hiroshi Yanagimoto
  • Patent number: 11425823
    Abstract: The present disclosure provides a method for producing a wiring substrate. A seeded substrate including an insulation substrate, a conductive undercoat layer, and a conductive seed layer provided in a first region, in that order, is first prepared. An insulation layer covering the seed layer and the undercoat layer is then formed. Subsequently, the insulation layer is etched to expose a surface of the seed layer and form a remaining insulation layer covering the undercoat layer in the second region. Subsequently, a voltage is applied between an anode and the seed layer while a solid electrolyte membrane containing a metal ion-containing aqueous solution disposed between the seed layer and the anode and the membrane and the seed layer pressed into contact with each other, thereby a metal layer being formed on the surface of the seed layer. Thereafter, the remaining insulation layer is removed and the undercoat layer is etched.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: August 23, 2022
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Haruki Kondoh, Rentaro Mori, Hiroshi Yanagimoto, Keiji Kuroda, Kazuaki Okamoto
  • Publication number: 20220098753
    Abstract: It is determined whether an imaginary component at a predetermined frequency of an alternating current impedance is equal to or more than a preliminarily set film-formable value or not. The metallic coating is formed in a state where the substrate is pressed by the solid electrolyte membrane when the imaginary component is equal to or more than the film-formable value in the determining. The metallic coating is formed in a state where the pressing of the substrate by the solid electrolyte membrane is released to separate the solid electrolyte membrane from the substrate, the solid electrolyte membrane is re-tensioned with a constant tensile force, and subsequently, the substrate is pressed by the re-tensioned solid electrolyte membrane when the imaginary component is smaller than the film-formable value in the determining.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 31, 2022
    Inventors: Haruki KONDOH, Akira KATO, Kazuaki OKAMOTO, Keiji KURODA
  • Publication number: 20220061165
    Abstract: A method for manufacturing a wiring board in which the adhesion between an underlayer and a seed layer is improved. A diffusion layer in which an element forming the underlayer and an element forming a coating layer are mutually diffused is formed between the underlayer and a wiring portion of the coating layer by irradiating the wiring portion with a laser beam. A seed layer is formed by removing a portion excluding the wiring portion of the coating layer from the underlayer. A metal layer is formed by disposing a solid electrolyte membrane between an anode and the seed layer and applying voltage between the anode and the underlayer. An exposed portion without the seed layer of the underlayer is removed from an insulating substrate.
    Type: Application
    Filed: August 12, 2021
    Publication date: February 24, 2022
    Inventors: Keiji KURODA, Rentaro MORI, Hiroshi YANAGIMOTO, Haruki KONDOH, Kazuaki OKAMOTO, Akira KATO
  • Publication number: 20220007506
    Abstract: A method for manufacturing a wiring board capable of improving adhesion between an underlayer and a seed layer. An electrically conductive underlayer is disposed on the surface of an insulating substrate and a seed layer containing metal is disposed on the surface of the underlayer to prepare a substrate with seed-layer. A diffusion layer in which elements forming the underlayer and seed layer are mutually diffused is formed between the underlayer and the seed layer, by irradiating the seed layer with a laser beam. A metal layer is formed on the surface of the seed layer by disposing a solid electrolyte membrane between an anode and the seed layer as a cathode and applying voltage between the anode and the underlayer. An exposed portion without the seed layer of the underlayer is removed from the insulating substrate.
    Type: Application
    Filed: July 2, 2021
    Publication date: January 6, 2022
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Keiji KURODA, Haruki KONDOH, Kazuaki OKAMOTO, Rentaro MORI, Hiroshi YANAGIMOTO
  • Publication number: 20210410291
    Abstract: A seeded substrate is first prepared. The seeded substrate includes an insulation substrate having a main surface composed of a first region and a second region other than the first region, and a conductive seed layer provided on the first region. Subsequently, a conductive layer is formed on at least the second region to obtain a first treated substrate. An insulation layer is then formed on the first treated substrate. The seed layer is then exposed. A metal layer is then formed on the surface of the seed layer. Here, a voltage is applied between the anode and the seed layer while a solid electrolyte membrane containing a metal ion-containing solution being disposed between the second treated substrate and the anode, and the solid electrolyte membrane and the seed layer being pressed into contact with each other. Thereafter, the insulation layer and the conductive layer are removed.
    Type: Application
    Filed: June 14, 2021
    Publication date: December 30, 2021
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Keiji KURODA, Haruki KONDOH, Kazuaki OKAMOTO, Rentaro MORI, Hiroshi YANAGIMOTO