Patents by Inventor Keiji Yamamura

Keiji Yamamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5397864
    Abstract: A wiring board including a plate; at least one conductive strip provided on the plate, the conductive strip having a specified connection position; and an electrically insulating film covering the conductive strip and having a slit extending in a direction crossing the longitudinal direction of the conductive strip. A tip of the conductive strip in the vicinity of the connection position has a distance from the connection position in a longitudinal direction of the conductive strip. The slit is formed at a position corresponding to the connection position.
    Type: Grant
    Filed: November 18, 1992
    Date of Patent: March 14, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akiteru Rai, Keiji Yamamura
  • Patent number: 5296063
    Abstract: A method for mounting a semiconductor device wherein a semiconductor device on which connection electrodes are formed is connected to a circuit board on which electrodes are formed in positions corresponding to the connection electrodes of the semiconductor device, the method including steps of applying an adhesive on a connection face of the semiconductor device to the circuit board or that of the circuit board to the semiconductor device, aligning the electrodes in positions corresponding to each other with the semiconductor device opposed to the circuit board, partially curing the adhesive in portions other than the electrodes, electrically evaluating the connection of the semiconductor device to the circuit board, and curing the uncured adhesive.
    Type: Grant
    Filed: September 11, 1992
    Date of Patent: March 22, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Keiji Yamamura, Takashi Nukii
  • Patent number: 5146301
    Abstract: A liquid-crystal panel includes a plurality of thin-film transistors. Terminal electrodes associated with gate bus lines which connect the gate electrodes of the thin-film transistors include a layer that is made of an electrode material used for the gate electrode, and a transparent conductive coating formed on the layer. This structure produces a stable connection at the terminal electrode of the gate electrode providing the liquid-crystal panel with excellent display qualities and a high reliability.
    Type: Grant
    Filed: October 14, 1988
    Date of Patent: September 8, 1992
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Keiji Yamamura, Takashi Nukii, Shigeo Nakabu
  • Patent number: 4949224
    Abstract: Semiconductor devices are mounted to a circuit board three-dimensionally by using a tape carrier film with device-connecting electrodes formed on both sides. Bump electrodes are formed on the devices and they are connected individually to these device-connecting electrodes each of which is connected to one of terminal electrodes on the circuit board. The film has throughhole conductors at places to electrically connect bump electrodes on opposite sides of the film.
    Type: Grant
    Filed: August 16, 1988
    Date of Patent: August 14, 1990
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Keiji Yamamura, Hirokazu Yoshida
  • Patent number: 4818728
    Abstract: A method for making a semiconductor device of a type comprising at least first and second semiconductor circuit units, which method comprises the step of forming a plurality of connecting electrodes on an upper surface of each of at least first and second semiconductor substrates; forming an electrically insulating layer entirely over the upper surface of each of the first and second substrates so as to cover the respective connecting electrodes; partially removing the insulating layer on each of the first and second substrates to permit the respective electrodes to be exposed to the outside; forming metal studs on the first substrate in contact with the electrodes so as to protrude outwardly of the respective insulating layer to complete the first semiconductor unit and forming solder deposits on the second substrate in contact with the respective electrodes on such second substrate to complete the second semiconductor unit; combining the first and second semiconductor units with the metal studs in the first
    Type: Grant
    Filed: December 3, 1987
    Date of Patent: April 4, 1989
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akiteru Rai, Keiji Yamamura, Takashi Nukii
  • Patent number: 4806503
    Abstract: A method for the replacement of semiconductor devices in a multi-chip module that is constructed by mounting semiconductor devices on a tape carrier used as an electrical wiring substrate, wherein when at least one of said semiconductor devices develops a flaw, it is cut away at the finger sections that connect said defective semiconductor device to the tape, and then a different and non-defective semiconductor device having finger sections longer than those of said defective semiconductor device that has been removed is connected to said tape in such a manner that the finger sections of said different and non-defective semiconductor device are joined and connected to the corresponding finger sections retained on said tape.
    Type: Grant
    Filed: October 23, 1986
    Date of Patent: February 21, 1989
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hirokazu Yoshida, Hiroshi Nakatani, Keiji Yamamura
  • Patent number: 4710680
    Abstract: A flat matrix display panel includes a plurality of scanning electrodes, and a plurality of data electrodes formed in a matrix fashion. The data electrodes are divided into two groups, one having terminals on the upper edge of the panel, and the other having terminals on the bottom edge of the panel. A first group data driver LSI is mounted on a substrate in a face-up bonding manner, and is connected to the terminals formed on the upper edge of the panel. A second group data driver LSI, which has the same construction as the first group data driver LSI, is mounted on the same side of the substrate in a facedown bonding manner, and is connected to the terminals formed on the bottom edge of the panel.
    Type: Grant
    Filed: March 24, 1987
    Date of Patent: December 1, 1987
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroshi Nakatani, Hirokazu Yoshida, Keiji Yamamura