Patents by Inventor Keisuke DOHI

Keisuke DOHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10931401
    Abstract: A likelihood generation device includes a similarity detection unit, a likelihood table reference unit, and a similarity processing unit. The similarity detection unit receives a modulation scheme selection signal and a received value, detects a likelihood similarity between information bits included in the received value based on the modulation scheme selection signal, and outputs a likelihood selection signal that specifies likelihood data to be searched for and an operation selection signal that specifies an operation on the likelihood data. The likelihood table reference unit registers, as likelihood data, a small region different from other small regions in the likelihood distribution indicating the likelihood of the information bits, and extracts likelihood data based on the likelihood selection signal from the likelihood table.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: February 23, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Keisuke Dohi
  • Patent number: 10778338
    Abstract: An optical transmitter includes: a bit converter that processes input bits in units of four bits, and generates an output bit sequence having eight bits based on one of a first conversion table, a second conversion table, and a third conversion table; and a symbol mapper that allocates the output bit sequence to an X-polarization and to a Y-polarization of each of two consecutive time slots. The bit converter performs a process of generating the output bit sequence based on the first conversion table, the second conversion table, and the third conversion table. The bit converter performs the process such that a sequence of two most significant bits and a sequence of two least significant bits of the output bit sequence are respectively associated with values that are allocated respectively to two constellation points having phases different by 180 degrees on a complex plane.
    Type: Grant
    Filed: April 19, 2017
    Date of Patent: September 15, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiroshi Miura, Tsuyoshi Yoshida, Keisuke Matsuda, Keisuke Dohi
  • Patent number: 10749550
    Abstract: A likelihood generation device is included in a receiving apparatus that receives a code-modulated signal including n?k information bits and k parity bits in N-dimensional arrangement, where N is a natural number greater than or equal to four, and n and k are natural numbers with k<n. The likelihood generation device includes: a temporary likelihood determination unit to determine, by using a table that includes an L-dimensional address space and stores a likelihood in each of the L-dimensional address spaces, likelihoods of an information bit and a parity bit that are transmitted by the code-modulated signal received, where L is a natural number with L<N; and a likelihood correction unit to update, among the likelihoods determined by the likelihood derivation unit, the likelihood of the information bit on a basis of a rule for generation of the parity bit.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: August 18, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Tsuyoshi Yoshida, Keisuke Dohi, Keisuke Matsuda, Hiroshi Miura
  • Patent number: 10652071
    Abstract: A symbol mapping device includes a transmission data processing unit receiving two transmission data having the same length, and if the length is a first length, uses the two transmission data as two output data without change, and if the length is less than the first length, adds dummy data to the two transmission data to generate two output data, each data having the first length; a parity addition unit generating two parity-added transmission data based on the two output data, where the two parity-added transmission data each contain parity data added to the transmission data and each have a second length; a shuffle unit extracting two modulation data, being data to be mapped, from the two parity-added transmission data generated by the parity addition unit; and a mapping processing unit mapping the two modulation data to two time slots of constellation points.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: May 12, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Keisuke Matsuda, Keisuke Dohi, Tsuyoshi Yoshida
  • Publication number: 20200119841
    Abstract: A likelihood generation device includes a similarity detection unit, a likelihood table reference unit, and a similarity processing unit. The similarity detection unit receives a modulation scheme selection signal and a received value, detects a likelihood similarity between information bits included in the received value based on the modulation scheme selection signal, and outputs a likelihood selection signal that specifies likelihood data to be searched for and an operation selection signal that specifies an operation on the likelihood data. The likelihood table reference unit registers, as likelihood data, a small region different from other small regions in the likelihood distribution indicating the likelihood of the information bits, and extracts likelihood data based on the likelihood selection signal from the likelihood table.
    Type: Application
    Filed: June 27, 2017
    Publication date: April 16, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventor: Keisuke DOHI
  • Publication number: 20200067756
    Abstract: A symbol mapping device includes a transmission data processing unit receiving two transmission data having the same length, and if the length is a first length, uses the two transmission data as two output data without change, and if the length is less than the first length, adds dummy data to the two transmission data to generate two output data, each data having the first length; a parity addition unit generating two parity-added transmission data based on the two output data, where the two parity-added transmission data each contain parity data added to the transmission data and each have a second length; a shuffle unit extracting two modulation data, being data to be mapped, from the two parity-added transmission data generated by the parity addition unit; and a mapping processing unit mapping the two modulation data to two time slots of constellation points.
    Type: Application
    Filed: March 22, 2017
    Publication date: February 27, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Keisuke MATSUDA, Keisuke DOHI, Tsuyoshi YOSHIDA
  • Publication number: 20200007241
    Abstract: An optical transmitter includes: a bit converter that processes input bits in units of four bits, and generates an output bit sequence having eight bits based on one of a first conversion table, a second conversion table, and a third conversion table; and a symbol mapper that allocates the output bit sequence to an X-polarization and to a Y-polarization of each of two consecutive time slots. The bit converter performs a process of generating the output bit sequence based on the first conversion table, the second conversion table, and the third conversion table. The bit converter performs the process such that a sequence of two most significant bits and a sequence of two least significant bits of the output bit sequence are respectively associated with values that are allocated respectively to two constellation points having phases different by 180 degrees on a complex plane.
    Type: Application
    Filed: April 19, 2017
    Publication date: January 2, 2020
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiroshi MIURA, Tsuyoshi YOSHIDA, Keisuke MATSUDA, Keisuke DOHI
  • Patent number: 10439653
    Abstract: Provided is a likelihood generation circuit including: a first likelihood calculation circuit, which includes a table having a reception value and a likelihood associated with each other, and is configured to calculate the likelihood corresponding to the reception value by referring to the table; a second likelihood calculation circuit, which includes an operational expression for calculating a likelihood based on a reception value, and is configured to calculate the likelihood corresponding to the reception value through use of the operational expression; and a likelihood output control circuit configured to: select any one likelihood calculation circuit of the first likelihood calculation circuit and the second likelihood calculation circuit for each reception value based on a reception frequency of the reception value; stop a calculation process of another likelihood calculation circuit that has not been selected; and output the likelihood calculated by the one likelihood calculation circuit that has been
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: October 8, 2019
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Keisuke Dohi
  • Publication number: 20190181886
    Abstract: A likelihood generation device is included in a receiving apparatus that receives a code-modulated signal including n?k information bits and k parity bits in N-dimensional arrangement, where N is a natural number greater than or equal to four, and n and k are natural numbers with k<n. The likelihood generation device includes: a temporary likelihood determination unit to determine, by using a table that includes an L-dimensional address space and stores a likelihood in each of the L-dimensional address spaces, likelihoods of an information bit and a parity bit that are transmitted by the code-modulated signal received, where L is a natural number with L<N; and a likelihood correction unit to update, among the likelihoods determined by the likelihood derivation unit, the likelihood of the information bit on a basis of a rule for generation of the parity bit.
    Type: Application
    Filed: September 1, 2016
    Publication date: June 13, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tsuyoshi YOSHIDA, Keisuke DOHI, Keisuke MATSUDA, Hiroshi MIURA
  • Publication number: 20180367165
    Abstract: Provided is a likelihood generation circuit including: a first likelihood calculation circuit, which includes a table having a reception value and a likelihood associated with each other, and is configured to calculate the likelihood corresponding to the reception value by referring to the table; a second likelihood calculation circuit, which includes an operational expression for calculating a likelihood based on a reception value, and is configured to calculate the likelihood corresponding to the reception value through use of the operational expression; and a likelihood output control circuit configured to: select any one likelihood calculation circuit of the first likelihood calculation circuit and the second likelihood calculation circuit for each reception value based on a reception frequency of the reception value; stop a calculation process of another likelihood calculation circuit that has not been selected; and output the likelihood calculated by the one likelihood calculation circuit that has been
    Type: Application
    Filed: March 28, 2016
    Publication date: December 20, 2018
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Keisuke DOHI