Patents by Inventor Keisuke Sumida

Keisuke Sumida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220366451
    Abstract: In a display apparatus, an acquisition unit acquires coordinate information associated with a fiducial marker installed in a specific area of a real space and a virtual object including advertisement information, an imaging unit images a real image and the fiducial marker, a self-position specifying unit specifies a self-position from a distance and an angle from the imaged fiducial marker, a state detecting unit detects a distance and an angle of view from the virtual point based on the self-position, a selection unit selects any virtual object existing within an angle of view from the self-position, and a display unit displays a main object of the virtual object existing within the angle of view from the self-position in such a manner that the main object is superimposed on a relative position on the real image and displays a main object and a sub object of the selected virtual object.
    Type: Application
    Filed: October 15, 2020
    Publication date: November 17, 2022
    Applicant: NEC Solution Innovators, Ltd.
    Inventors: Wataru SAKUMA, Kohei KANAZAWA, Yutaka MORIKAWA, Hikaru NONAKA, Masahito TAKAHASHI, Takamitsu WATANABE, Keisuke SUMIDA, Yohei MIZUTANI, Yuya KIMOTO
  • Patent number: 7764017
    Abstract: A plasma display panel comprises front plate (20) having display electrode (24) formed on a glass substrate with discharge gap (50), and back plate (30) having barrier ribs (34) formed to divide discharge cells, and arranged in a manner to confront the front plate (20). The barrier ribs (34) comprise vertical barrier rib (34a) arranged in parallel to an address electrode and horizontal barrier rib (34b) arranged in a manner to cross the vertical barrier rib (34a), and the vertical barrier rib (34a) has a shape satisfying the formula of H1>H2>H3, where H1 denotes a height of it at crossing portion (56) with the horizontal barrier rib (34b), H2 a height at a position of the discharge gap (50) of the display electrode (24), and H3 a height at a predetermined point between the position of the discharge gap (50) and the position of the crossing portion (56) with the horizontal barrier rib (34b).
    Type: Grant
    Filed: August 7, 2007
    Date of Patent: July 27, 2010
    Assignee: Panasonic Corporation
    Inventors: Morio Fujitani, Keisuke Sumida, Shinichiro Ishino, Kenichi Kusaka
  • Publication number: 20100176721
    Abstract: A plasma display panel including rear glass substrate having address electrode, insulating layer, barrier rib and a phosphor layer thereon. Insulating layer does not contain lead. An average value of a void ratio of a region at a depth of up to 50% from rear glass substrate in a thickness of insulating layer ranges from 5% to 15%. A plasma display panel having a long lifetime and high productivity is achieved.
    Type: Application
    Filed: April 1, 2009
    Publication date: July 15, 2010
    Inventors: Ken Hasegawa, Keisuke Sumida, Morio Fujitani, Kenichi Kusaka, Hideyuki Shirahase, Kohshiroh Mizuno, Koji Aoto, Keiji Horikawa
  • Patent number: 7744439
    Abstract: The present invention provides an image display device capable of displaying a good image by suppressing yellowing of a glass substrate, and a high-yield manufacturing method of the glass substrate. The image display device is formed of a front-side glass substrate and a back-side glass substrate. In this manufacturing method, a glass substrate is used as the front-side glass substrate when Sn++ content in the glass substrate is a predetermined value or less, and the glass substrate is used as the back-side glass substrate when the Sn++ content exceeds the predetermined value.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: June 29, 2010
    Assignee: Panasonic Corporation
    Inventors: Daisuke Adachi, Hiroyasu Tsuji, Keisuke Sumida
  • Patent number: 7545561
    Abstract: Provided are an image display device capable of displaying a good image by suppressing yellowing of a glass substrate, and an evaluating method of the glass substrate. The image display device is formed using the glass substrate where reflectance at wavelength of 220 nm is 5% or lower. In the evaluating method of the glass substrate for the image display device, Sn++ content in the glass substrate is analyzed using reflectance at wavelength of 220 nm.
    Type: Grant
    Filed: November 27, 2003
    Date of Patent: June 9, 2009
    Assignee: Panasonic Corporation
    Inventors: Daisuke Adachi, Hiroyasu Tsuji, Keisuke Sumida
  • Publication number: 20090102378
    Abstract: A plasma display panel comprises front plate (20) having display electrode (24) formed on a glass substrate with discharge gap (50), and back plate (30) having barrier ribs (34) formed to divide discharge cells, and arranged in a manner to confront the front plate (20). The barrier ribs (34) comprise vertical barrier rib (34a) arranged in parallel to an address electrode and horizontal barrier rib (34b) arranged in a manner to cross the vertical barrier rib (34a), and the vertical barrier rib (34a) has a shape satisfying the formula of H1>H2>H3, where H1 denotes a height of it at crossing portion (56) with the horizontal barrier rib (34b), H2 a height at a position of the discharge gap (50) of the display electrode (24), and H3 a height at a predetermined point between the position of the discharge gap (50) and the position of the crossing portion (56) with the horizontal barrier rib (34b).
    Type: Application
    Filed: August 7, 2007
    Publication date: April 23, 2009
    Inventors: Morio Fujitani, Keisuke Sumida, Shinichiro Ishino, Kenichi Kusaka
  • Patent number: 7495393
    Abstract: The present invention provides an image display device capable of displaying a good image by suppressing yellowing of a glass substrate, and a high-yield manufacturing method of the glass substrate. The image display device is formed of a front-side glass substrate and a back-side glass substrate. In this manufacturing method, a glass substrate is used as the front-side glass substrate when Sn++ content in the glass substrate is a predetermined value or less, and the glass substrate is used as the back-side glass substrate when the Sn++ content exceeds the predetermined value.
    Type: Grant
    Filed: November 27, 2003
    Date of Patent: February 24, 2009
    Assignee: Panasonic Corporation
    Inventors: Daisuke Adachi, Hiroyasu Tsuji, Keisuke Sumida
  • Patent number: 7487649
    Abstract: The present invention provides a manufacturing method of a glass substrate for an image display device having high picture quality. The reducing force in a float furnace is controlled to be decreased so that Sn++ content on a surface of the glass substrate forming an Ag electrode is a predetermined value or less. When the resultant Sn++ content on the surface of the glass substrate forming the Ag electrode exceeds the predetermined value, the surface is partially removed to decrease the Sn++ content to the predetermined value or less to suppress the occurrence of yellowing of the glass substrate.
    Type: Grant
    Filed: November 27, 2003
    Date of Patent: February 10, 2009
    Assignee: Panasonic Corporation
    Inventors: Daisuke Adachi, Hiroyasu Tsuji, Keisuke Sumida
  • Patent number: 7471042
    Abstract: An object of the present invention is to provide a technique for relatively easily suppressing the yellowing of a Plasma Display Panel in which electrodes comprising silver are disposed on the substrates, and thus render image displays with high luminance and high quality. In order to achieve the object, an arrangement is made in which the electrodes comprising silver further include an element whose standard electrode potential is lower than that of silver, such as Cr, Al, In, B, and Ti, or a compound of such an element, as a silver ionization inhibiting substance.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: December 30, 2008
    Assignee: Panasonic Corporation
    Inventors: Morio Fujitani, Hiroyuki Yonehara, Masaki Aoki, Keisuke Sumida, Hideki Asida, Junichi Hibino, Daisuke Adachi
  • Patent number: 7453206
    Abstract: A PDP has first and second substrates which face each other with a space in between. A display electrode pair and a dielectric layer are formed on the first substrate, and a plurality of discharge cells are formed between the first and second substrates along the display electrode pair. In this construction, two or more depressions are provided in the dielectric layer in an area corresponding to each discharge cell. This improves luminous intensity and illumination efficiency. Also, to form the dielectric layer on the first substrate, first a transfer film is made by providing a dielectric precursor layer on a support film, then depressions are formed in the dielectric precursor layer of the transfer film, and lastly the dielectric precursor layer of the transfer film is transferred onto the first substrate. This decreases the number of manufacturing steps and increases the yield, thereby reducing manufacturing costs.
    Type: Grant
    Filed: May 27, 2002
    Date of Patent: November 18, 2008
    Assignee: Panasonic Corporation
    Inventors: Morio Fujitani, Hiroyuki Yonehara, Masaki Aoki, Keisuke Sumida, Hideki Asida, Junichi Hibino
  • Patent number: 7422503
    Abstract: Disclosed here is a plasma display panel having stable addressing characteristics and a method of manufacturing a plasma display panel having such a reliable structure. According to the plasma display panel and the manufacturing method, on back plate (2) that confronts front plate (1) having scan electrodes (6) and sustain electrodes (7) thereon, data electrodes (10), first dielectric layer (17) disposed to cover the data electrodes, priming electrodes (15), and second dielectric layer (18) disposed to cover the priming electrodes are formed in the order named; at the same time, the softening temperatures of the materials forming the components disposed on the back plate are determined so as to become lower in the order named. The temperature setting protects first dielectric layer (17) from deterioration or deformation, improving dielectric voltage between data electrodes (10) and priming electrodes (15).
    Type: Grant
    Filed: May 18, 2004
    Date of Patent: September 9, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Morio Fujitani, Keisuke Sumida, Tatsuo Mifune, Shinichiro Ishino, Hiroyuki Tachibana
  • Patent number: 7378796
    Abstract: A plasma display panel has a stable addressing characteristic, no dielectric breakdown, and high reliability. Data electrodes (10), first dielectric layer (17) for covering the data electrodes (10), priming electrodes (15), and second dielectric layer (18) for covering the priming electrodes (15) are sequentially formed on back substrate (2). Slotted parts (10a) are formed in a part of each data electrode (10). Thus, data electrodes (10) are prevented from deforming during the manufacturing, and dielectric voltage between data electrodes (10) and priming electrodes (15) is improved.
    Type: Grant
    Filed: June 1, 2004
    Date of Patent: May 27, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Morio Fujitani, Keisuke Sumida, Tatsuo Mifune, Shinichiro Ishino, Hiroyuki Tachibana
  • Publication number: 20080049305
    Abstract: The present invention provides an image display device capable of displaying a good image by suppressing yellowing of a glass substrate, and an evaluating method of the glass substrate. The image display device is formed using the glass substrate where reflectance at wavelength of 220 nm is 5% or lower. In the evaluating method of the glass substrate for the image display device, Sn++ content in the glass substrate is analyzed using reflectance at wavelength of 220 nm.
    Type: Application
    Filed: September 19, 2007
    Publication date: February 28, 2008
    Inventors: Daisuke Adachi, Hiroyasu Tsuji, Keisuke Sumida
  • Publication number: 20070209394
    Abstract: The present invention provides an image display device capable of displaying a good image by suppressing yellowing of a glass substrate, and a high-yield manufacturing method of the glass substrate. The image display device is formed of a front-side glass substrate and a back-side glass substrate. In this manufacturing method, a glass substrate is used as the front-side glass substrate when Sn++ content in the glass substrate is a predetermined value or less, and the glass substrate is used as the back-side glass substrate when the Sn++ content exceeds the predetermined value.
    Type: Application
    Filed: April 12, 2007
    Publication date: September 13, 2007
    Inventors: Daisuke Adachi, Hiroyasu Tsuji, Keisuke Sumida
  • Publication number: 20060279214
    Abstract: Disclosed here is a plasma display panel having stable addressing characteristics and a method of manufacturing a plasma display panel having such a reliable structure. According to the plasma display panel and the manufacturing method, on back plate (2) that confronts front plate (1) having scan electrodes (6) and sustain electrodes (7) thereon, data electrodes (10), first dielectric layer (17) disposed to cover the data electrodes, priming electrodes (15), and second dielectric layer (18) disposed to cover the priming electrodes are formed in the order named; at the same time, the softening temperatures of the materials forming the components disposed on the back plate are determined so as to become lower in the order named. The temperature setting protects first dielectric layer (17) from deterioration or deformation, improving dielectric voltage between data electrodes (10) and priming electrodes (15).
    Type: Application
    Filed: May 18, 2004
    Publication date: December 14, 2006
    Inventors: Morio Fujitani, Keisuke Sumida, Tatsuo Mifune, Shinichiro Ishino, Hiroyuki Tachibana
  • Patent number: 7140940
    Abstract: The present invention intends to provide a manufacturing method for a PDP that can continuously apply phosphor ink for a long time and can accurately and evenly produce phosphor layers even when the cell construction is very fine. To do so, phosphor ink is continuously expelled from a nozzle while the nozzle moves relative to channels between partition walls formed on a plate so as to scan and apply phosphor ink to the channels. While doing so the path taken by the nozzle within each channel between a pair of partition walls is adjusted based on position information for the channel. When phosphor particles is successively applied to a plurality of channels, phosphor ink is continuously expelled from the nozzle even when the nozzle is positioned away from the channels. The phosphor ink is composed of: phosphor particles that have an average particle diameter of 0.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: November 28, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Kawamura, Shigeo Suzuki, Masaki Aoki, Kanako Miyashita, Mitsuhiro Ohtani, Hiroyuki Kado, Keisuke Sumida, Nobuyuki Kirihara
  • Patent number: 7125303
    Abstract: An electrode plate, a method of manufacturing the same, a gas discharge panel using an electrode plate, and a method of manufacturing the same are provided by incorporating a relatively simple structure, which can keep electrodes formed on a plate from peeling or becoming misaligned. In the electrode plate, at least one electrode is formed and adhered to a main surface of a plate by a thick film or thin film formation method, wherein of all ends of the electrode, at least an end opposite to an end at a power supply point is adhered to the main surface of the plate with stronger adhesion than the other parts of the electrode.
    Type: Grant
    Filed: April 18, 2003
    Date of Patent: October 24, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideaki Yasui, Kazuhiko Sugimoto, Keisuke Sumida, Hiroyoshi Tanaka, Shinya Fujiwara, Hideki Marunaka, Kazunori Hirao
  • Patent number: 7074101
    Abstract: A method of manufacturing a plasma display panel, whose glass substrate is not tinged and luminance is high, is provided, even when silver material is used. A layer including silver compounds, which include sulfur generated on a surface of an electrode by reacting on sulfur in air, is removed before a forming process of a dielectric layer. Then decomposition of the compound is restricted in a firing process of the dielectric layer. Even when the electrode having the silver material with high electrical conductivity is used, yellow coloration on the glass substrate is prevented. As a result, a high quality plasma display panel which does not decrease in luminance is provided.
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: July 11, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daisuke Adachi, Keisuke Sumida, Hideki Ashida, Morio Fujitani
  • Patent number: 7063584
    Abstract: A manufacturing method for a gas discharge display panel includes a disposing step of disposing on a substrate, material of one of an electrode, a dielectric layer, a barrier rib, and a phosphor layer; and a baking step of baking the substrate on which the material has been disposed, while the substrate is carried on a support platform. The support platform has at least one channel in a surface thereof on which the substrate is placed, extending from a covered area covered by the substrate through to an exposed area not covered by the substrate.
    Type: Grant
    Filed: May 28, 2002
    Date of Patent: June 20, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Yonehara, Masaki Aoki, Keisuke Sumida, Morio Fujitani, Hideki Asida
  • Publication number: 20060113914
    Abstract: A plasma display panel has a stable addressing characteristic, no dielectric breakdown, and high reliability. Data electrodes (10), first dielectric layer (17) for covering them, priming electrodes (15), and second dielectric layer (18) for covering them are sequentially formed on back substrate (2). Slotted parts (10a) are formed in a part of each data electrode (10). Thus, data electrodes (10) are prevented from deforming during the manufacturing, and dielectric voltage between data electrodes (10) and priming electrodes (15) is improved.
    Type: Application
    Filed: June 1, 2004
    Publication date: June 1, 2006
    Inventors: Morio Fujitani, Keisuke Sumida, Tatsuo Mifune, Shinichiro Ishino, Hiroyuki Tachibana