Patents by Inventor Keith C. Griggs
Keith C. Griggs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9306499Abstract: An electronic device comprises an input transmission line that receives an input signal, an output transmission line that transmits an output signal, a local oscillator transmission line that transmits a local oscillator signal, multiple amplification and mixing stages arranged in parallel between the input and output transmission lines and each amplifying a received portion of the input signal and mixing the amplified portion of the input signal with the local oscillator signal to produce a portion of the output signal, and multiple amplification stages arranged in parallel between the input and output transmission lines and each amplifying a received portion of the input signal to produce a portion of the output signal. The amplification stages are located proximate an output side of the electronic device, and the amplification and mixing stages are located proximate an input side of the electronic device.Type: GrantFiled: September 27, 2013Date of Patent: April 5, 2016Assignee: Keysight Technologies, Inc.Inventor: Keith C. Griggs
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Patent number: 9191186Abstract: A device compensates for distortions of a serial data signal introduced by a communication channel in a serial communication system. The device includes main path, first and second delay paths, first and second pulse generators, and combiner. The first and second delay paths delay a tapped-off portion of the serial data signal by first and second delay amounts, respectively, where the first delay amount is less than a main path delay amount and the second delay amount greater the main path delay amount. The first and second pulse generators generate first and second compensation pulses in response to the serial data signal delayed by the first and second delay amounts, respectively. The combiner combines the first and second compensation pulses with the main path delayed serial data signal, where the first and second compensation pulses compensate for magnitude loss and nonlinear phase of the main path delayed serial data signal.Type: GrantFiled: July 25, 2014Date of Patent: November 17, 2015Assignee: Keysight Technologies, Inc.Inventors: Michael J. Lujan, Keith C. Griggs
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Publication number: 20150091632Abstract: An electronic device comprises an input transmission line that receives an input signal, an output transmission line that transmits an output signal, a local oscillator transmission line that transmits a local oscillator signal, multiple amplification and mixing stages arranged in parallel between the input and output transmission lines and each amplifying a received portion of the input signal and mixing the amplified portion of the input signal with the local oscillator signal to produce a portion of the output signal, and multiple amplification stages arranged in parallel between the input and output transmission lines and each amplifying a received portion of the input signal to produce a portion of the output signal. The amplification stages are located proximate an output side of the electronic device, and the amplification and mixing stages are located proximate an input side of the electronic device.Type: ApplicationFiled: September 27, 2013Publication date: April 2, 2015Inventor: Keith C. Griggs
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Patent number: 8847687Abstract: An amplifier device having an extended bandwidth includes a DC coupled amplifier and multiple low noise amplifiers connected in series with one another and connected in parallel with at least a portion of the DC coupled amplifier. The DC coupled amplifier has a broad bandwidth, and each of the low noise amplifiers has a narrow bandwidth and a center frequency higher than a high end frequency of the broad bandwidth of the DC coupled amplifier. The extended bandwidth of the amplifier device is a combination of the broad bandwidth and the first narrow bandwidth.Type: GrantFiled: March 26, 2012Date of Patent: September 30, 2014Assignee: Agilent Technologies, Inc.Inventor: Keith C. Griggs
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Publication number: 20130249637Abstract: An amplifier device having an extended bandwidth includes a DC coupled amplifier and multiple low noise amplifiers connected in series with one another and connected in parallel with at least a portion of the DC coupled amplifier. The DC coupled amplifier has a broad bandwidth, and each of the low noise amplifiers has a narrow bandwidth and a center frequency higher than a high end frequency of the broad bandwidth of the DC coupled amplifier. The extended bandwidth of the amplifier device is a combination of the broad bandwidth and the first narrow bandwidth.Type: ApplicationFiled: March 26, 2012Publication date: September 26, 2013Applicant: AGILENT TECHNOLOGIES, INC.Inventor: Keith C. Griggs
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Patent number: 6463392Abstract: A system and method are provided for detecting a stable region in a data signal to facilitate the alignment between a data signal and a corresponding clock signal. The system includes a processor coupled to a local interface and a memory coupled to the local interface. The system also includes a boundary detection circuit configured to perform a simultaneous sampling of a reference signal and a delayed reference signal to ascertain a degree of stability of a position in the reference signal. The reference signal is the signal received from the target system and the delayed reference signal is a delayed copy of the reference signal. The system also includes boundary detection logic stored on the memory and executed by the processor to control the operation of the boundary detection circuit. The boundary detection logic includes logic to detect a boundary of the stable region of the reference.Type: GrantFiled: August 16, 1999Date of Patent: October 8, 2002Assignee: Agilent Technologies, Inc.Inventors: Richard A. Nygaard, Edward G. Pumphrey, Keith C. Griggs
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Patent number: 5940965Abstract: A probe head includes analog amplifier inputs, a ground plane, and hundreds of probe leads between the inputs and the pins of a circuit under test. The customer defines the grounded pins of the circuit under test. Non-active probe leads, i.e. leads corresponding to the grounded pins are connected to the ground plane, maximizing the connections between the grounds of the probe and the circuit under test and minimizing unequal ground potentials. The probe circuit is on a probe circuit board, while the connections between the ground plane and the leads are fusible elements on a separate ground personality board. The probe is placed on a simulated circuit under test, the grounded pins on the circuit under test are protected by an insulating cap, and a voltage is placed on the remainder of the pins to fuse the elements corresponding the active probe leads.Type: GrantFiled: April 30, 1997Date of Patent: August 24, 1999Assignee: Hewlett-Packard CompanyInventors: Thomas F. Uhling, David J. Dascher, Keith C. Griggs
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Patent number: 5898312Abstract: A probe head includes analog amplifier inputs, a ground plane, and hundreds of probe leads between the inputs and the pins of a circuit under test. The customer defines the grounded pins of the circuit under test. Non-active probe leads, i.e. leads corresponding to the grounded pins are connected to the ground plane, maximizing the connections between the grounds of the probe and the circuit under test and minimizing unequal ground potentials. The probe circuit is on a probe circuit board, while the connections between the ground plane and the leads are fusible elements on a separate ground personality board. The probe is placed on a simulated circuit under test, the grounded pins on the circuit under test are protected by an insulating cap, and a voltage is placed on the remainder of the pins to fuse the elements corresponding the active probe leads.Type: GrantFiled: April 30, 1997Date of Patent: April 27, 1999Assignee: Hewlett-Packard CompanyInventors: Thomas F. Uhling, David J. Dascher, Keith C. Griggs
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Patent number: 5654647Abstract: A probe head includes analog amplifier inputs, a ground plane, and hundreds of probe leads between the inputs and the pins of a circuit under test. The customer defines the grounded pins of the circuit under test. Non-active probe leads, i.e. leads corresponding to the grounded pins are connected to the ground plane, maximizing the connections between the grounds of the probe and the circuit under test and minimizing unequal ground potentials. The probe circuit is on a probe circuit board, while the connections between the ground plane and the leads are fusible elements on a separate ground personality board. The probe is placed on a simulated circuit under test, the grounded pins on the circuit under test are protected by an insulating cap, and a voltage is placed on the remainder of the pins to fuse the elements corresponding the active probe leads.Type: GrantFiled: August 23, 1995Date of Patent: August 5, 1997Assignee: Hewlett-Packard CompanyInventors: Thomas F. Uhling, David J. Dascher, Keith C. Griggs
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Patent number: 5654669Abstract: A first amplifier channel between an input and output includes an input transistor emitter and a first output transistor emitter connected together to form a first emitter pair. A current source is connected to the emitter pair via a transistor which is controlled by a latch. Programming the latch permits the channel to be turned on or off. The emitter pair is connected to a positive voltage through a resistor and to ground through a diode to force it to a controlled off voltage, which prevents signals from passing when the channel is off. There is a output driver amplifier in a feedback circuit. An outdisable circuit controls the voltage and current of the output driver amplifier to place the output in a state in which it appears electrically as an open circuit when the channel is off. Multiple programmable amplifiers can be combined to make a multiplexer, a selectable gain circuit, or a selectable attenuation circuit, all with high band width and high signal integrity.Type: GrantFiled: May 2, 1996Date of Patent: August 5, 1997Assignee: Hewlett-Packard CompanyInventors: Thomas F. Uhling, Keith C. Griggs
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Patent number: 5629617Abstract: An analog electronic test probe includes hundreds of inputs each connected to two amplifiers, each in a separate multiplexer stage on an integrated circuit. A programmer, responsive to a dial, shifts data through a shift register of latches each of which is connected to one of the amplifiers, activating the amplifier(s) connected to the selected input, thereby multiplexing it (them) to selected output(s). Similarly, the gain for each output may be selected. An outdisable circuit connected to the outputs of each multiplexer and the outputs of each IC chip causes each output to appear electrically as an open circuit when no input associated with the multiplexer or chip is selected. This permits any number of multiplexers and IC chips to be daisy-chained together.Type: GrantFiled: January 6, 1995Date of Patent: May 13, 1997Assignee: Hewlett-Packard CompanyInventors: Thomas F. Uhling, David J. Dascher, Kenneth Rush, Keith C. Griggs
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Patent number: 5625299Abstract: A probe head includes integrated circuit chip inputs, a ground plane on a circuit board, and hundreds of probe leads comprising traces on the circuit board connected between the inputs and a circuit under test. Each trace is about 3 mils wide. There is a DICLAD polytetrafluoroethylene dielectric material of dielectric constant of about 2.2 between the ground and traces. Every other trace is electrically connected to the ground plane. Input resistors are buried in the circuit board and there is an on-chip input divider network. The customer defines the grounded pins of a circuit to be tested. Probe leads corresponding to the grounded pins are connected to the ground plane, maximizing the connections between the grounds of the probe and the circuit under test and minimizing unequal ground potentials.Type: GrantFiled: February 3, 1995Date of Patent: April 29, 1997Inventors: Thomas F. Uhling, David J. Dascher, Keith C. Griggs
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Patent number: 5600278Abstract: A first amplifier channel between an input and output includes an input transistor emitter and a first output transistor emitter connected together to form a first emitter pair. A current source is connected to the emitter pair via a transistor which is controlled by a latch. Programming the latch permits the channel to be turned on or off. The emitter pair is connected to a positive voltage through a resistor and to ground through a diode to force it to a controlled off voltage, which prevents signals from passing when the channel is off. There is a output driver amplifier in a feedback circuit. An outdisable circuit controls the voltage and current of the output driver amplifier to place the output in a state in which it appears electrically as an open circuit when the channel is off. Multiple programmable amplifiers can be combined to make a multiplexer, a selectable gain circuit, or a selectable attenuation circuit, all with high band width and high signal integrity.Type: GrantFiled: February 3, 1995Date of Patent: February 4, 1997Assignee: Hewlett-Packard CompanyInventors: Thomas F. Uhling, Keith C. Griggs