Patents by Inventor Keith D. Mullius

Keith D. Mullius has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Isolation chamber arrangement for serial processing of semiconductor wafers for the electronic industry
    Patent number: 6827789
    Abstract: An apparatus for the treatment of semiconductor wafers, comprising a supportive frame and a process table arranged on the supportive frame. The process table comprises a stationary upper platen and a stationary lower plate. An intermediate indexing plate is rotatively arranged between the upper platen and the lower plate. At least one wafer support pin is attached to the indexing plate for the support of a wafer by the indexing plate. An upper housing is arranged on the upper platen and an outer lower housing is arranged on the lower plate. A displacable lower isolation chamber is disposed within the outer lower housing, being displacable against the indexing plate to define a treatment module between the upper housing and the lower isolation chamber in which the wafer is treated. A wafer supporting treatment plate is arranged within the lower isolation chamber, for controlled rapid treatment of a wafer within the treatment module.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: December 7, 2004
    Assignee: Semigear, Inc.
    Inventors: Chunghsin Lee, Jian Zhang, Darren M Simonelli, Keith D. Mullius, David A. Wassen
  • Isolation chamber arrangement for serial processing of semiconductor wafers for the electronic industry
    Publication number: 20040000378
    Abstract: An apparatus for the treatment of semiconductor wafers, comprising a supportive frame and a process table arranged on the supportive frame. The process table comprises a stationary upper platen and a stationary lower plate. An intermediate indexing plate is rotatively arranged between the upper platen and the lower plate. At least one wafer support pin is attached to the indexing plate for the support of a wafer by the indexing plate. An upper housing is arranged on the upper platen and an outer lower housing is arranged on the lower plate. A displacable lower isolation chamber is disposed within the outer lower housing, being displacable against the indexing plate to define a treatment module between the upper housing and the lower isolation chamber in which the wafer is treated. A wafer supporting treatment plate is arranged within the lower isolation chamber, for controlled rapid treatment of a wafer within the treatment module.
    Type: Application
    Filed: July 1, 2002
    Publication date: January 1, 2004
    Inventors: Chunghsin Lee, Jian Zhang, Darren M. Simonelli, Keith D. Mullius, David A. Wassen