Patents by Inventor Keith Robert Pflederer

Keith Robert Pflederer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11899964
    Abstract: Resources of an electronic device are partitioned into a plurality of resource portions to be utilized by a plurality of clients. Each resource portion is assigned to a respective client, has a respective partition identifier (ID), and corresponds to a plurality memory bandwidth usage states tracked for a plurality of memory blocks. For each resource portion, each of the memory bandwidth usage states is associated with a respective memory block and indicates at least how much of a memory access bandwidth assigned to the respective partition ID to access the respective memory block is used. A usage level is determined for each resource partition based on the memory bandwidth usage states, and applied to adjust a credit count. When the credit count is adjusted beyond a request issue threshold, a next data access request is issued from a memory access request queue for the respective partition ID.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: February 13, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Ramkumar Srinivasan, Amit Kumar, Vedaraman Geetha, Keith Robert Pflederer, Vikas Kumar Sinha
  • Patent number: 11829637
    Abstract: Resources of an electronic device are partitioned into a plurality of resource portions to be utilized by a plurality of clients. Each resource portion is assigned to a respective client, has a respective partition identifier (ID), and corresponds to a plurality of memory bandwidth usage states tracked for a plurality of memory blocks. For each resource portion, each of the memory bandwidth usage states is associated with a respective memory block and indicates at least how much of a memory access bandwidth assigned to the respective partition ID to access the respective memory block is used. A usage level is determined for each resource partition based on the memory bandwidth usage states, and applied to adjust a credit count. When the credit count is adjusted beyond a request issue threshold, a next data access request is issued from a memory access request queue for the respective partition ID.
    Type: Grant
    Filed: February 9, 2023
    Date of Patent: November 28, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Ramkumar Srinivasan, Amit Kumar, Vedaraman Geetha, Keith Robert Pflederer, Vikas Kumar Sinha
  • Patent number: 11789645
    Abstract: Resources of an electronic device are partitioned into a plurality of resource portions to be utilized by a plurality of clients. Each resource portion is assigned to a respective client, has a respective partition identifier (ID), and corresponds to a plurality of memory bandwidth usage states tracked for a plurality of memory blocks. For each resource portion, each of the memory bandwidth usage states is associated with a respective memory block and indicates at least how much of a memory access bandwidth assigned to the respective partition ID to access the respective memory block is used. A usage level is determined for each resource partition based on the memory bandwidth usage states, and applied to adjust a credit count. When the credit count is adjusted beyond a request issue threshold, a next data access request is issued from a memory access request queue for the respective partition ID.
    Type: Grant
    Filed: February 9, 2023
    Date of Patent: October 17, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Ramkumar Srinivasan, Amit Kumar, Vedaraman Geetha, Keith Robert Pflederer, Vikas Kumar Sinha
  • Patent number: 11741028
    Abstract: Innovative techniques to efficient stripe ordered writes across multiple socket-to-socket links. The ordered writes may be PCIe ordered writes. Each socket-to-socket write (or remote write) for an address may be converted into two transactions. The first transaction may ensure that coherency for the address is ensured. The second transaction may be the actual request transaction to write the data of the address. In so doing, when multiple remote writes are involved, the remote writes may be distributed over multiple socket-to-socket links to maximize bandwidth.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: August 29, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Vedaraman Geetha, Keith Robert Pflederer
  • Publication number: 20230195365
    Abstract: Resources of an electronic device are partitioned into a plurality of resource portions to be utilized by a plurality of clients. Each resource portion is assigned to a respective client, has a respective partition identifier (ID), and corresponds to a plurality of memory bandwidth usage states tracked for a plurality of memory blocks. For each resource portion, each of the memory bandwidth usage states is associated with a respective memory block and indicates at least how much of a memory access bandwidth assigned to the respective partition ID to access the respective memory block is used. A usage level is determined for each resource partition based on the memory bandwidth usage states, and applied to adjust a credit count. When the credit count is adjusted beyond a request issue threshold, a next data access request is issued from a memory access request queue for the respective partition ID.
    Type: Application
    Filed: February 9, 2023
    Publication date: June 22, 2023
    Inventors: Ramkumar Srinivasan, Amit Kumar, Vedaraman Geetha, Keith Robert Pflederer, Vikas Kumar Sinha
  • Publication number: 20230195364
    Abstract: Resources of an electronic device are partitioned into a plurality of resource portions to be utilized by a plurality of clients. Each resource portion is assigned to a respective client, has a respective partition identifier (ID), and corresponds to a plurality of memory bandwidth usage states tracked for a plurality of memory blocks. For each resource portion, each of the memory bandwidth usage states is associated with a respective memory block and indicates at least how much of a memory access bandwidth assigned to the respective partition ID to access the respective memory block is used. A usage level is determined for each resource partition based on the memory bandwidth usage states, and applied to adjust a credit count. When the credit count is adjusted beyond a request issue threshold, a next data access request is issued from a memory access request queue for the respective partition ID.
    Type: Application
    Filed: February 9, 2023
    Publication date: June 22, 2023
    Inventors: Ramkumar Srinivasan, Amit Kumar, Vedaraman Geetha, Keith Robert Pflederer, Vikas Kumar Sinha
  • Patent number: 11620243
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a system-level cache to allocate cache resources by a way-partitioning process. One of the methods includes maintaining a mapping between partitions and priority levels and allocating primary ways to respective enabled partitions in an order corresponding to the respective priority levels assigned to the enabled partitions.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: April 4, 2023
    Assignee: Google LLC
    Inventors: Vinod Chamarty, Xiaoyu Ma, Hongil Yoon, Keith Robert Pflederer, Weiping Liao, Benjamin Dodge, Albert Meixner, Allan Douglas Knies, Manu Gulati, Rahul Jagdish Thakur, Jason Rupert Redgrave
  • Publication number: 20230067749
    Abstract: Resources of an electronic device are partitioned into a plurality of resource portions to be utilized by a plurality of clients. Each resource portion is assigned to a respective client, has a respective partition identifier (ID), and corresponds to a plurality memory bandwidth usage states tracked for a plurality of memory blocks. For each resource portion, each of the memory bandwidth usage states is associated with a respective memory block and indicates at least how much of a memory access bandwidth assigned to the respective partition ID to access the respective memory block is used. A usage level is determined for each resource partition based on the memory bandwidth usage states, and applied to adjust a credit count. When the credit count is adjusted beyond a request issue threshold, a next data access request is issued from a memory access request queue for the respective partition ID.
    Type: Application
    Filed: February 7, 2022
    Publication date: March 2, 2023
    Inventors: Ramkumar SRINIVASAN, Amit KUMAR, Vedaraman GEETHA, Keith Robert PFLEDERER, Vikas Kumar SINHA
  • Publication number: 20210255972
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a system-level cache to allocate cache resources by a way-partitioning process. One of the methods includes maintaining a mapping between partitions and priority levels and allocating primary ways to respective enabled partitions in an order corresponding to the respective priority levels assigned to the enabled partitions.
    Type: Application
    Filed: December 31, 2020
    Publication date: August 19, 2021
    Inventors: Vinod Chamarty, Xiaoyu Ma, Hongil Yoon, Keith Robert Pflederer, Weiping Liao, Benjamin Dodge, Albert Meixner, Allan Douglas Knies, Manu Gulati, Rahul Jagdish Thakur, Jason Rupert Redgrave
  • Patent number: 10884959
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a system-level cache to allocate cache resources by a way-partitioning process. One of the methods includes maintaining a mapping between partitions and priority levels and allocating primary ways to respective enabled partitions in an order corresponding to the respective priority levels assigned to the enabled partitions.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: January 5, 2021
    Assignee: Google LLC
    Inventors: Vinod Chamarty, Xiaoyu Ma, Hongil Yoon, Keith Robert Pflederer, Weiping Liao, Benjamin Dodge, Albert Meixner, Allan Douglas Knies, Manu Gulati, Rahul Jagdish Thakur, Jason Rupert Redgrave
  • Publication number: 20200257639
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a system-level cache to allocate cache resources by a way-partitioning process. One of the methods includes maintaining a mapping between partitions and priority levels and allocating primary ways to respective enabled partitions in an order corresponding to the respective priority levels assigned to the enabled partitions.
    Type: Application
    Filed: July 22, 2019
    Publication date: August 13, 2020
    Inventors: Vinod Chamarty, Xiaoyu Ma, Hongil Yoon, Keith Robert Pflederer, Weiping Liao, Benjamin Dodge, Albert Meixner, Allan Douglas Knies, Manu Gulati, Rahul Jagdish Thakur, Jason Rupert Redgrave
  • Patent number: 10474385
    Abstract: Systems, devices, and methods for managing fragmentation in hardware-assisted compression of data in physical computer memory which may result in reduced internal fragmentation. An example computer-implemented method comprises: providing, by a memory management program to compression hardware, a compression command including an address in physical computer memory of data to be compressed and a list of at least two available buffers for storing compressed data; using, by the compression hardware, the address included in the compression command to retrieve uncompressed data; compressing the uncompressed data; and selecting, by the compression hardware, from the list of at least two available buffers, at least two buffers for storing compressed data based on an amount of space that would remain if the compressed data were stored in the at least two buffers, wherein each of the at least two selected buffers differs in size from at least one other of the selected buffers.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: November 12, 2019
    Assignee: Google LLC
    Inventors: Santhosh Rao, Sameer Nanda, Vyacheslav Vladimirovich Malyugin, Luigi Semenzato, Aaron Durbin, Keith Robert Pflederer, Hsiao-Heng Kelin Lee, Rahul Jagdish Thakur
  • Publication number: 20170242614
    Abstract: Systems, devices, and methods for managing fragmentation in hardware-assisted compression of data in physical computer memory which may result in reduced internal fragmentation. An example computer-implemented method comprises: providing, by a memory management program to compression hardware, a compression command including an address in physical computer memory of data to be compressed and a list of at least two available buffers for storing compressed data; using, by the compression hardware, the address included in the compression command to retrieve uncompressed data; compressing the uncompressed data; and selecting, by the compression hardware, from the list of at least two available buffers, at least two buffers for storing compressed data based on an amount of space that would remain if the compressed data were stored in the at least two buffers, wherein each of the at least two selected buffers differs in size from at least one other of the selected buffers.
    Type: Application
    Filed: December 29, 2016
    Publication date: August 24, 2017
    Applicant: GOOGLE INC.
    Inventors: Santhosh RAO, Sameer NANDA, Vyacheslav Vladimirovich MALYUGIN, Luigi SEMENZATO, Aaron DURBIN, Keith Robert PFLEDERER, Hsiao-Heng Kelin LEE, Rahul Jagdish THAKUR
  • Patent number: 9287893
    Abstract: Disclosed is an integrated circuit having a decompression block. The decompression block is configured as a pipeline that may include a length module and a distance module. The length module evaluates a length for each symbol. The distance module may resolve distances in an at least one length-distance pair. The length module may include a shifter stage configured to store two consecutive words, and control a sliding window of symbols, in order to extract literals or distances. The length module may include a mapper stage configured to map the literals or distances to positions in the output stream. The distance module may include a pointer replacement stage and a resolution stage. The pointer replacement stage configured to replace distances, represented as pointers within an output word, with either literals or other pointers to prior words. The resolution stage configured to replace the other pointers with literals, and output the literals.
    Type: Grant
    Filed: May 1, 2015
    Date of Patent: March 15, 2016
    Assignee: GOOGLE INC.
    Inventor: Keith Robert Pflederer