Patents by Inventor Keith W. Smith

Keith W. Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240085949
    Abstract: An apparatus can include a display, a facial interface, and a connector between the display and the facial interface. The facial interface can at least translate or rotate relative to the display via the connector.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 14, 2024
    Inventors: Darshan R. Kasar, Samuel G. Smith, Jonathan M. Anderson, Erin M. Bosch, Muhammad F. Hossain, Liam R. Martinez, Andrew Gallaher, Ian A. Guy, Brian Baillargeon, Keith W. Kirkwood, Timothy J. Rasmussen
  • Publication number: 20030225764
    Abstract: The invention is directed to a system for displaying data in a collaborative work environment. The system may include a server, a database, and an accessing browser. A user may provide to the server an identification. The identification may be associated with access permissions to the data. The server may then retrieve a set of requested data and compile an instruction file such as a web page. The instruction file may display the data in two panels. One panel may provide a subset of the data in an editable format. Another panel may provide a second subset of the data in a read-only format. Both panels are displayed in a single window or screen. The user may then edit the editable data and submit it to the server. In addition, a second user may access the data such that the subset of the data is provided in a read-only format and the second subset in an editable format. In this manner, various users with differing responsibilities for subsets of data may view the data in a single window.
    Type: Application
    Filed: May 29, 2002
    Publication date: December 4, 2003
    Inventors: Keith W. Smith, Roland Sobrepena
  • Publication number: 20020048965
    Abstract: Disclosed is a process for forming, over a semiconductor substrate, a multilayer structure having successively a first layer of silicon-containing material, a relatively thin oxide layer, and a second layer of silicon-containing material. The oxide layer has a substantially uniform thickness in a range from about 1 Angstrom to about 20 Angstroms. The oxide layer consists essentially of silicon dioxide that is formed by exposing the first layer to an aqueous oxidizing bath at a relatively low temperature such that diffusion of dopants in the semiconductor substrate is not induced. The oxide layer prevents dopants from outgassing and diffusing out of the first layer and into the second layer. Also disclosed is a structure formed by the disclosed process.
    Type: Application
    Filed: July 19, 1999
    Publication date: April 25, 2002
    Inventors: KEITH W. SMITH, CHARLES E. CARVER, CLARENCE J. HIGDON
  • Patent number: 6372662
    Abstract: Disclosed is a process for forming, over a semiconductor substrate, a multilayer structure having successively a first layer of silicon-containing material, a relatively thin oxide layer, and a second layer of silicon-containing material. The oxide layer has a substantially uniform thickness in a range from about 1 Angstrom to about 20 Angstroms. The oxide layer consists essentially of silicon dioxide that is formed by exposing the first layer to an aqueous oxidizing bath at a relatively low temperature such that diffusion of dopants in the semiconductor substrate is not induced. The oxide layer prevents dopants from outgassing and diffusing out of the first layer and into the second layer. Also disclosed is a structure formed by the disclosed process.
    Type: Grant
    Filed: July 19, 1999
    Date of Patent: April 16, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Keith W. Smith, Charles E. Carver, Clarence J. Higdon
  • Patent number: 6120285
    Abstract: A tube for use in a thermal processing furnace. The tube comprises an elongated cylindrical tube having an inner surface with a plurality of dimples disposed thereon. In one preferred version of the invention, the dimples are formed as an integral part of the inner surface of the cylindrical tube. In another aspect of the invention, the dimpled furnace tube is incorporated into a thermal processing furnace. In this aspect of the invention, the furnace includes a furnace tube having an inner surface describing an elongated cylindrical heated chamber for receiving and processing a plurality of axially aligned spaced apart semiconductor wafers. The inner surface has a plurality of dimples disposed thereon. The furnace further includes an inlet for introducing reactant and/or inert gases into one end of the cylindrical chamber to flow axially within the chamber by the wafers and an outlet for removing the gases from the cylindrical chamber.
    Type: Grant
    Filed: June 3, 1997
    Date of Patent: September 19, 2000
    Assignee: Micron Technology, Inc.
    Inventor: Keith W. Smith
  • Patent number: 5989718
    Abstract: Disclosed is a process for forming, over a semiconductor substrate, a multilayer structure having successively a first layer of silicon-containing material, a relatively thin oxide layer, and a second layer of silicon-containing material. The oxide layer has a substantially uniform thickness in a range from about 1 Angstrom to about 20 Angstroms. The oxide layer consists essentially of silicon dioxide that is formed by exposing the first layer to an aqueous oxidizing bath at a relatively low temperature such that diffusion of dopants in the semiconductor substrate is not induced. The oxide layer prevents dopants from outgassing and diffusing out of the first layer and into the second layer. Also disclosed is a structure formed by the disclosed process.
    Type: Grant
    Filed: September 24, 1997
    Date of Patent: November 23, 1999
    Assignee: Micron Technology
    Inventors: Keith W. Smith, Charles E. Carver, Clarence J. Higdon
  • Patent number: 5645417
    Abstract: A tube for use in a thermal processing furnace. The tube comprises an elongated cylindrical tube having an inner surface with a plurality of dimples disposed thereon. In one preferred version of the invention, the dimples are formed as an integral part of the inner surface of the cylindrical tube. In another aspect of the invention, the dimpled furnace tube is incorporated into a thermal processing furnace. In this aspect of the invention, the furnace includes a furnace tube having an inner surface describing an elongated cylindrical heated chamber for receiving and processing a plurality of axially aligned spaced apart semiconductor wafers. The inner surface has a plurality of dimples disposed thereon. The furnace further includes an inlet for introducing reactant and/or inert gases into one end of the cylindrical chamber to flow axially within the chamber by the wafers and an outlet for removing the gases from the cylindrical chamber.
    Type: Grant
    Filed: October 9, 1995
    Date of Patent: July 8, 1997
    Assignee: Micron Technology, Inc.
    Inventor: Keith W. Smith