Patents by Inventor Ken Aihara

Ken Aihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7713851
    Abstract: A silicon epitaxial layer 2 is grown in vapor phase on a silicon single crystal substrate 1 manufactured by the Czochralski method, and doped with boron so as to adjust the resistivity to 0.02 ?·cm or below, oxygen precipitation nuclei 11 are formed in the silicon single crystal substrate 1, by carrying out annealing at 450° C. to 750° C., in an oxidizing atmosphere, for a duration of time allowing formation of a silicon oxide film only to as thick as 2 nm or below on the silicon epitaxial layer 2 as a result of the annealing, and thus-formed silicon oxide film 3 is etched as the first cleaning after the low-temperature annealing, using a cleaning solution. By this process, the final residual thickness of the silicon oxide film can be suppressed only to a level equivalent to native oxide film, without relying upon the hydrofluoric acid cleaning.
    Type: Grant
    Filed: August 3, 2005
    Date of Patent: May 11, 2010
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Fumitaka Kume, Tomosuke Yoshida, Ken Aihara, Ryoji Hoshi, Satoshi Tobe, Naohisa Toda, Fumio Tahara
  • Publication number: 20090008346
    Abstract: The present invention is a vertical boat 8 for heat treatment by which a plurality of wafer-like objects to be treated are supported with an interval in a vertical direction by a column having support surfaces and carried into a vertical heat treatment apparatus and carried out, wherein a lower surface of each of the wafer-like objects to be treated is supported by a plurality of support surfaces 4 formed on the column, a flatness of a plane formed by the plurality of the support surfaces being in contact with a same one of the objects to be treated is 0.03 mm or less, and a parallelism thereof is 0.07 mm or less. Thereby, there can be provided a vertical boat for heat treatment and a method for heat treatment by which even if the heat treatment is performed at an extremely high temperature of 1200° C.
    Type: Application
    Filed: August 29, 2005
    Publication date: January 8, 2009
    Applicant: SHIN-ETSU HANDOTAI CO, LTD.
    Inventors: Ken Aihara, Shuji Takahashi, Yoshiyuki Uehara
  • Publication number: 20080038526
    Abstract: A silicon epitaxial wafer 100 formed by growing a silicon epitaxial layer 2 on a silicon single crystal substrate 1, produced by a CZ method, and doped with boron so that a resistivity thereof is in the range of 0.009 ?·cm or higher and 0.012 ?·cm or lower. The silicon single crystal substrate 1 has a density of the oxygen precipitation nuclei of 1×1010 cm?3 or higher. A width of a no-oxygen-precipitation-nucleus-forming-region 15, formed between the silicon epitaxial layer 2 and the silicon single substrate 1, is in the range of more than 0 ?m and less than 10 ?m. Thereby, provided is a silicon epitaxial wafer using a boron doped p+ CZ substrate, wherein a formed width of no-oxygen-precipitation-nucleus-forming-region is reduced sufficiently, and oxygen precipitates can be formed having a density sufficient enough to exert an IG effect.
    Type: Application
    Filed: July 5, 2005
    Publication date: February 14, 2008
    Applicant: Shin-Etsu Handotai Co., Ltd.
    Inventors: Fumitaka Kume, Tomosuke Yushida, Ken Aihara, Ryoji Hoshi, Satoshi Tobe, Naohisa Toda, Fumio Tahara
  • Publication number: 20070269338
    Abstract: A silicon epitaxial wafer 100 is formed by growing a silicon epitaxial layer 2 on a silicon single crystal substrate 1, produced by means of a CZ method, and doped with boron so that a resistivity thereof is less than 0.018 ?·cm. The silicon single crystal substrate 1 has a density of bulk stacking faults 13 in the silicon single crystal substrate 1 in the range of 1×108 cm?3 or higher and 3×109 cm?3 or lower. Thereby, provided is a silicon epitaxial wafer having a boron doped p+ CZ substrate with a resistivity of 0.018?·cm or lower, and a state of formation of oxygen precipitates can be adjusted adequately so as to secure a sufficient IG effect and to suppress a problem of bow and deformation of a substrate, despite that sizes of oxygen precipitates is so small to be observed accurately.
    Type: Application
    Filed: June 27, 2005
    Publication date: November 22, 2007
    Applicant: Shin-Etsu Handotai Co., Ltd
    Inventors: Fumitaka Kume, Tomosuke Yoshida, Ken Aihara, Ryoji Hoshi, Satoshi Tobe, Naohisa Toda, Fumio Tahara
  • Publication number: 20070243699
    Abstract: A silicon epitaxial layer 2 is grown in vapor phase on a silicon single crystal substrate 1 manufactured by the Czochralski method, and doped with boron so as to adjust the resistivity to 0.02 ?·cm or below, oxygen precipitation nuclei 11 are formed in the silicon single crystal substrate 1, by carrying out annealing at 450° C. to 750° C., in an oxidizing atmosphere, for a duration of time allowing formation of a silicon oxide film only to as thick as 2 nm or below on the silicon epitaxial layer 2 as a result of the annealing, and thus-formed silicon oxide film 3 is etched as the first cleaning after the low-temperature annealing, using a cleaning solution. By this process, the final residual thickness of the silicon oxide film can be suppressed only to a level equivalent to native oxide film, without relying upon the hydrofluoric acid cleaning.
    Type: Application
    Filed: August 3, 2005
    Publication date: October 18, 2007
    Applicant: Shin-Etsu Handotai Co., Ltd.
    Inventors: Fumitaka Kume, Tomosuke Yoshida, Ken Aihara, Ryoji Hoshi, Satoshi Tobe, Naohisa Toda, Fumio Tahara
  • Patent number: 7189293
    Abstract: The present invention is a method of producing an annealed wafer wherein a silicon single crystal wafer having a diameter of 200 mm or more produced by the Czochralski (CZ) method is subjected to a high temperature heat treatment in an atmosphere of an argon gas, a hydrogen gas, or a mixture gas thereof at a temperature of 1100–1350° C. for 10–600 minutes, and before the high temperature heat treatmen, a pre-annealing is performed at a temperature less than the temperature of the high temperature heat treatment, so that the growth of slip dislocations is suppressed by growing oxide precipitates. Thereby, there is provided a method of producing an annealed wafer wherein the generation and growth of slip dislocations generated in a high temperature heat treatment are suppressed and the defect density in the wafer surface layer is lowered even in the case of a silicon single crystal wafer having a large diameter of 200 mm or more, and the annealed wafer.
    Type: Grant
    Filed: June 25, 2002
    Date of Patent: March 13, 2007
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Norihiro Kobayashi, Masaro Tamatsuka, Takatoshi Nagoya, Wei Feig Qu, Hiroshi Takeno, Ken Aihara
  • Patent number: 7078357
    Abstract: There are provided a heat-treating method capable of both increasing BMD density and widening DZ layer width, and a silicon wafer having DZ layer width wider compared with a conventional one regardless of high BMD density. In the method, heat treatment (RTA treatment) is performed to a silicon wafer containing interstitial oxygen with a rapid heating-rapid cooling apparatus, thereby atomic vacancies being injected from a surface of the wafer to form a maximum position of an atomic vacancy concentration in a depth direction in the vicinity of the surface of the wafer, and thereafter heat treatment (post annealing) is performed to move the maximum position of the atomic vacancy concentration in the vicinity of the surface of the wafer into the inside of the wafer.
    Type: Grant
    Filed: October 22, 2001
    Date of Patent: July 18, 2006
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Satoshi Tobe, Ken Aihara
  • Publication number: 20060031107
    Abstract: An advertisement portfolio model reduces risk in an advertisement transaction for an individual advertisement product. First, a relational expression is used to determine a comprehensive advertisement risk management index for statistically representing a maximum unexpected loss amount to which the advertisement product is subject at a certain probability during the advertising campaign period. Second, a plurality of correlation coefficient data of the advertisement product are calculated from the observational data of the advertisement product.
    Type: Application
    Filed: July 27, 2005
    Publication date: February 9, 2006
    Applicant: Dentsu Inc.
    Inventors: Ken Aihara, Norio Hibiki
  • Publication number: 20040231759
    Abstract: The present invention is a method of producing an annealed wafer wherein a silicon single crystal wafer having a diameter of 200 mm or more produced by the Czochralski (CZ) method is subjected to a high temperature heat treatment in an atmosphere of an argon gas, a hydrogen gas, or a mixture gas thereof at a temperature of 1100-1350° C. for 10-600 minutes, and before the high temperature heat treatmen, a pre-annealing is performed at a temperature less than the temperature of the high temperature heat treatment, so that the growth of slip dislocations is suppressed by growing oxide precipitates. Thereby, there is provided a method of producing an annealed wafer wherein the generation and growth of slip dislocations generated in a high temperature heat treatment are suppressed and the defect density in the wafer surface layer is lowered even in the case of a silicon single crystal wafer having a large diameter of 200 mm or more, and the annealed wafer.
    Type: Application
    Filed: December 24, 2003
    Publication date: November 25, 2004
    Inventors: Norihiro Kobayashi, Masaro Tamatsuka, Takatoshi Nagoya, Wei Feig Qu, Hiroshi Takeno, Ken Aihara
  • Publication number: 20040102056
    Abstract: There are provided a heat-treating method capable of both increasing BMD density and widening DZ layer width, and a silicon wafer having DZ layer width wider compared with a conventional one regardless of high BMD density. In the method, heat treatment (RTA treatment) is performed to a silicon wafer containing interstitial oxygen with a rapid heating-rapid cooling apparatus, thereby atomic vacancies being injected from a surface of the wafer to form a maximum position of an atomic vacancy concentration in a depth direction in the vicinity of the surface of the wafer, and thereafter heat treatment (post annealing) is performed to move the maximum position of the atomic vacancy concentration in the vicinity of the surface of the wafer into the inside of the wafer.
    Type: Application
    Filed: April 25, 2003
    Publication date: May 27, 2004
    Inventors: Satoshi Tobe, Ken Aihara
  • Patent number: 6548035
    Abstract: A silicon single crystal wafer for epitaxial growth grown by the CZ method, which is doped with nitrogen and has a V-rich region over its entire plane, or doped with nitrogen, has an OSF region in its plane, and shows an LEP density of 20/cm2 or less or an OSF density of 1×104/cm2 or less in the OSF region, epitaxial wafer utilizing the substrate, as well as methods for producing them and method for evaluating a substrate suitable for an epitaxial wafer. There are provided a substrate for an epitaxial wafer that suppresses crystal defects to be generated in an epitaxial layer when epitaxial growth is performed on a CZ silicon single crystal wafer doped with nitrogen and also has superior IG ability, epitaxial wafer utilizing the substrate, as well as methods for producing them and method for evaluating a substrate suitable for an epitaxial wafer.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: April 15, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Akihiro Kimura, Makoto Iida, Yoshinori Hayamizu, Ken Aihara, Masanori Kimura
  • Patent number: 6544656
    Abstract: A silicon wafer is produced by growing a silicon single crystal ingot having a resistivity of 100 &OHgr;·cm or more and an initial interstitial oxygen concentration of 10 to 25 ppma by the Czochralski method, processing the silicon single crystal ingot into a wafer, and subjecting the wafer to an oxygen precipitation heat treatment so that a residual interstitial oxygen concentration in the wafer should become 8 ppma or less. A silicon wafer produced as described above shows little decrease in resistivity even after a heat treatment in device production etc. Further, if a silicon wafer is produced and heat-treated so that the wafer should have the above-defined initial interstitial oxygen concentration and residual interstitial oxygen concentration, slip dislocations in a subsequent heat treatment process are prevented irrespective of resistivity.
    Type: Grant
    Filed: November 7, 2000
    Date of Patent: April 8, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Takao Abe, Ken Aihara, Shoji Akiyama, Tetsuya Igarashi, Weifeng Qu, Yoshinori Hayamizu, Shigeru Saito
  • Publication number: 20030065603
    Abstract: Provided is an advertisement portfolio model that can reduce a risk in an advertisement transaction for an individual advertisement product.
    Type: Application
    Filed: June 26, 2002
    Publication date: April 3, 2003
    Inventors: Ken Aihara, Norio Hibiki
  • Patent number: 6478883
    Abstract: A silicon wafer for epitaxial growth consisting of a highly boron-doped silicon single crystal wafer, an antimony-doped silicon single crystal wafer or a phosphorus-doped silicon single crystal wafer, which allows easy oxygen precipitation and exhibits high gettering ability in spite of its suppressed oxygen concentration, and an epitaxial silicon wafer in which an epitaxial layer grown by using the aforementioned wafer as a substrate wafer has an extremely low heavy metal impurity concentration are produced with high productivity and supplied. The present invention relates to a boron-doped silicon single crystal wafer having a resistivity of from 10 m&OHgr;·cm to 100 m&OHgr;·cm, an antimony-doped silicon single crystal wafer, or a phosphorus-doped silicon single crystal wafer, which are produced by slicing a silicon single crystal ingot grown by the Czochralski method with nitrogen doping.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: November 12, 2002
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Masaro Tamatsuka, Ken Aihara, Katsuhiko Miki, Hiroshi Takeno, Yoshinori Hayamizu
  • Patent number: 6479312
    Abstract: By providing a nitrogen-doped low carrier concentration layer 13 having both of a donor concentration and an acceptor concentration controlled below 1×1016/cm3 at a p-n junction portion between an n-type GaP layer 12 and a p-type GaP layer 14, the luminance of the GaP light emitting device can be improved by as much as 20 to 30% over the conventional one. Suppressing the donor concentration and the acceptor concentration in the low carrier concentration layer 13 below 1×1016/cm3 inevitably gives a carrier concentration, which is expressed as a difference between both concentrations, lower than 1×1016/cm3 accordingly. The emission efficiency upon injection of electrons or holes can be improved by suppressing the concentration of the donor which serves as non-emissive center below 1×1016/cm3 to thereby extend the carrier lifetime; and by concomitantly suppressing the carrier concentration at a level significantly lower than that in the adjacent layers 12 and 14.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: November 12, 2002
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Masato Yamada, Susumu Higuchi, Kousei Yumoto, Makoto Kawasaki, Ken Aihara
  • Patent number: 6264906
    Abstract: There is disclosed a method for heat treatment of a silicon substrate produced by the CZ method by utilizing a rapid thermal annealer, wherein the heat treatment is performed under an atmosphere composed of 100% nitrogen, or 100% oxygen, or a mixed atmosphere of oxygen and nitrogen by heating the silicon substrate to a maximum holding temperature within a range of from 1125° C. to the melting point of silicon, and holding the substrate at that maximum holding temperature for a holding time of 5 seconds or more, and then the substrate is rapidly cooled at a cooling rate of 8° C./second or more from the maximum holding temperature. In the method, the amount of oxygen precipitation nuclei in the substrate can be controlled by changing the maximum holding temperature and the holding time.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: July 24, 2001
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Ken Aihara, Hiroshi Takeno
  • Patent number: 6206961
    Abstract: A method of determining oxygen precipitation behavior in a silicon monocrystal through use of a programmed computer. According to this method, an initial oxygen concentration of a silicon monocrystal, an impurity concentration or resistivity of the silicon monocrystal, and conditions of heat treatment performed on the silicon monocrystal are input, and an amount of precipitated oxygen and bulk defect density of the silicon monocrystal after the heat treatment are calculated based on the input data. The method enables quick, simple, and accurate determination of an amount of precipitated oxygen and bulk defect density in silicon during or after heat treatment.
    Type: Grant
    Filed: November 9, 1998
    Date of Patent: March 27, 2001
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Hiroshi Takeno, Ken Aihara
  • Patent number: 6162708
    Abstract: There is disclosed a method for producing an epitaxial silicon single crystal wafer comprising the steps of growing a silicon single crystal ingot wherein nitrogen is doped by Czochralski method, slicing the silicon single crystal ingot to provide a silicon single crystal wafer, and forming an epitaxial layer in the surface layer portion of the silicon single crystal wafer. There can be manufactured easily and in high productivity an epitaxial silicon monocrystal wafer which has high gettering capability when a substrate having a low boron concentration is used, a low concentration of heavy metal impurity, and an excellent crystallinity.
    Type: Grant
    Filed: May 11, 1999
    Date of Patent: December 19, 2000
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Masaro Tamatsuka, Ken Aihara, Tomosuke Yoshida
  • Patent number: 6143071
    Abstract: There is disclosed a method for heat treatment of a silicon substrate produced by the CZ method by utilizing a rapid thermal annealer, wherein the heat treatment is performed under an atmosphere composed of 100% nitrogen, or 100% oxygen, or a mixed atmosphere of oxygen and nitrogen by heating the silicon substrate to a maximum holding temperature within a range of from 1125.degree. C. to the melting point of silicon, and holding the substrate at that maximum holding temperature for a holding time of 5 seconds or more, and then the substrate is rapidly cooled at a cooling rate of 8.degree. C./second or more from the maximum holding temperature. In the method, the amount of oxygen precipitation nuclei in the substrate can be controlled by changing the maximum holding temperature and the holding time.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: November 7, 2000
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Ken Aihara, Hiroshi Takeno
  • Patent number: 5533387
    Abstract: The height x.sub.i (i=1, 2, . . . , N) of a plurality of measuring points on a silicon wafer from a reference plane is measured by means of an AFM (atomic force microscope), the autocorrelation function R.sub.j represented by the equation below is determined: ##EQU1## Where x denotes: ##EQU2## is determined, an arbitrary number of autocorrelation function R.sub.j with large value from said autocorrelation function R.sub.j are selected, and the microroughness on said silicon wafer is analyzed based on the distances between the point R.sub.j=0 and said selected points R.sub.j 's with large value except for R.sub.j=0.
    Type: Grant
    Filed: September 14, 1995
    Date of Patent: July 9, 1996
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Ken Aihara, Yutaka Kitagawara, Takao Takenaka