Abstract: A semiconductor circuit comprises a digital circuit portion, which in turn comprises a combinatorial logic block. The semiconductor circuit comprises a scan chain for loading and applying a predefined digital test pattern to inputs of the combinatorial logic block. A bi-directional communication port is adapted for writing incoming data to an address space of the digital circuit portion such as register addresses and/or memory addresses. Scan control hardware comprises a plurality of individually addressable scan control registers which are mapped to the address space of the bi-directional communication port. A method of testing the digital circuit portion through the scan chain involves writing bit values to inputs of the individually addressable scan control registers and reading bit values from at least one output of an individually addressable scan control register.

Abstract: A semiconductor circuit comprising a digital circuit portion, which comprises a combinatorial logic block. The semiconductor circuit further comprises a scan chain for loading and applying a predefined digital test pattern to inputs of the combinatorial logic block. A bi-directional communication port is adapted for writing incoming data to an address space of the digital circuit portion. Scan control hardware comprises a plurality of individually addressable scan control registers which are mapped to the address space of the bi-directional communication port. A method of testing the digital circuit portion involves, using the scan chain, writing bit values to inputs of the individually addressable scan control registers, and reading bit values from at least one output of an individually addressable scan control register. The method and semiconductor circuit allow thorough testing and diagnosing of failing semiconductor devices, including core logic thereof, while mounted on a printed circuit board.

Abstract: This invention further features a method of apportioning channels in a programmable multi-source, multi-destination system, the method including determining the source for each channel by: a) computing the sum of the number of channels carried by the current and all preceding sources, b) computing a source identifier for each channel based on the computed sum of the number of channels carried by the current and all preceding sources, determining which section of the source the channel is located based on the computed source identifier, and determining the destination for each channel by: a) computing the sum of the number of channels carried by the current and all preceding destinations, and b) computing a destination identifier of the first channel sent to each destination based on the computed sum of the number of channels carried by the current and all preceding destinations.

Abstract: This invention further features a method of apportioning channels in a programmable multi-source, multi-destination system, the method including determining the source for each channel by: a) computing the sum of the number of channels carried by the current and all preceding sources, b) computing a source identifier for each channel based on the computed sum of the number of channels carried by the current and all preceding sources, determining which section of the source the channel is located based on the computed source identifier, and determining the destination for each channel by: a) computing the sum of the number of channels carried by the current and all preceding destinations, and b) computing a destination identifier of the first channel sent to each destination based on the computed sum of the number of channels carried by the current and all preceding destinations.