Patents by Inventor Kenichi Iio

Kenichi Iio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240036156
    Abstract: A patch array antenna, an antenna, and a Radio Detecting and Ranging (RADAR) apparatus are disclosed. The patch array antenna is provided with a dielectric substrate and a plurality of antenna elements formed on the dielectric substrate. The patch array antenna is arranged in a first direction (longitudinal direction L) and connected in series. At least one terminal of at least one input terminal and at least one output terminal connected to at least one antenna element among the plurality of antenna elements is connected at a position away from the centerline extending in the first direction of the antenna element. The antenna includes a plurality of patch array antennas and the RADAR apparatus is formed using the antenna.
    Type: Application
    Filed: October 16, 2023
    Publication date: February 1, 2024
    Applicant: Furuno Electric Co., Ltd.
    Inventor: Kenichi IIO
  • Patent number: 9083069
    Abstract: A power combiner/distributor including first, second, and third waveguides connected with each other in a planar shape, and for either one of distributing power inputted from the first waveguide to the second and third waveguides and combining powers inputted from the second and third waveguides to input the combined power to the first waveguide is provided. The power combiner/distributor includes a branch circuit connected with the first waveguide and for branching a transmission path formed in the first waveguide into first and second transmission paths, and decoupling circuits connected with the branch circuit and also to the second and third waveguides, respectively, the decoupling circuits having a power losing resonator coupled to the second and third waveguides, resonating within an operation frequency band, and causing a power loss.
    Type: Grant
    Filed: October 17, 2012
    Date of Patent: July 14, 2015
    Assignee: FURUNO ELECTRIC COMPANY LIMITED
    Inventor: Kenichi Iio
  • Patent number: 7463109
    Abstract: Methods and apparatuses are directed to a transition between a waveguide and a microstrip. One embodiment features an open-ended waveguide having an exposed side at a distal end, a substrate coupled to the open-ended waveguide at a proximate end, a resonator coupled to the substrate, a microstrip line electromagnetically coupled to the resonator, and a backshort coupled to the substrate. Another embodiment features receiving an electromagnetic wave, collecting an incident portion of the received electromagnetic wave, generating first wave having a resonance at a predetermined frequency using the incident portion of the received electromagnetic wave, reflecting a portion of the received electromagnetic wave off of a reduced scale backshort, back towards a collector, generating a second wave having a resonance at a predetermined frequency using the reflected portion of the received electromagnetic wave, and combining the first wave and the second wave in phase.
    Type: Grant
    Filed: April 17, 2006
    Date of Patent: December 9, 2008
    Assignee: Furuno Electric Company Ltd.
    Inventor: Kenichi Iio
  • Publication number: 20060255875
    Abstract: Methods and apparatuses are directed to a transition between a waveguide and a microstrip. One embodiment features an open-ended waveguide having an exposed side at a distal end, a substrate coupled to the open-ended waveguide at a proximate end, a resonator coupled to the substrate, a microstrip line electromagnetically coupled to the resonator, and a backshort coupled to the substrate. Another embodiment features receiving an electromagnetic wave, collecting an incident portion of the received electromagnetic wave, generating first wave having a resonance at a predetermined frequency using the incident portion of the received electromagnetic wave, reflecting a portion of the received electromagnetic wave off of a reduced scale backshort, back towards a collector, generating a second wave having a resonance at a predetermined frequency using the reflected portion of the received electromagnetic wave, and combining the first wave and the second wave in phase.
    Type: Application
    Filed: April 17, 2006
    Publication date: November 16, 2006
    Applicant: FURUNO Electric Company Limited
    Inventor: Kenichi Iio
  • Patent number: 6909343
    Abstract: A resonator, a filter, an oscillator, a duplexer, and a communication apparatus employing these devices have improved efficiency characteristics in confining an electromagnetic field in an opening of an electrode, suppressed current concentration, and minimized conductor loss. Electrode patterns are formed near short-circuited positions in a slot so that the slot will be divided into smaller-width slot lines. Consequently, the efficiency in confining the electromagnetic field is improved, and conductor loss is minimized.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: June 21, 2005
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Kenichi Iio
  • Patent number: 6828867
    Abstract: A dielectric resonator includes a slot line constructed by providing a slot electrode having a spiral slot at either an external face of a dielectric layer or inside the dielectric layer and a shielding conductor provided at a predetermined distance from the slot electrode. The slot line is employed as a resonant line so as to provide a dielectric resonator, an inductor, a capacitor, a dielectric filter, an oscillator, and/or a communication device.
    Type: Grant
    Filed: February 6, 2003
    Date of Patent: December 7, 2004
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yohei Ishikawa, Kenichi Iio, Hiroaki Tanaka, Yutaka Ida
  • Patent number: 6717492
    Abstract: A planar dielectric integrated circuit is provided such that energy conversion loss between a planar dielectric line and electronic components is small and that impedance matching between them can be easily obtained. A planar dielectric line is provided by causing two slots to oppose each other with a dielectric plate interposed in between, a slot line and line-conversion conductor patterns are provided in the end portions of the planar dielectric line, and an FET is disposed in such a manner as to be extended over the slot line.
    Type: Grant
    Filed: February 8, 2002
    Date of Patent: April 6, 2004
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yohei Ishikawa, Koichi Sakamoto, Sadao Yamashita, Kenichi Iio
  • Publication number: 20040036543
    Abstract: A resonator, a filter, an oscillator, a duplexer, and a communication apparatus employing these devices have improved efficiency characteristics in confining an electromagnetic field in an opening of an electrode, suppressed current concentration, and minimized conductor loss. Electrode patterns are formed near short-circuited positions in a slot so that the slot will be divided into smaller-width slot lines. Consequently, the efficiency in confining the electromagnetic field is improved, and conductor loss is minimized.
    Type: Application
    Filed: August 22, 2003
    Publication date: February 26, 2004
    Inventor: Kenichi Iio
  • Patent number: 6661315
    Abstract: A resonator, a filter, an oscillator, a duplexer, and a communication apparatus employing these devices have improved efficiency characteristics in confining an electromagnetic field in an opening of an electrode, suppressed current concentration, and minimized conductor loss. Electrode patterns are formed near short-circuited positions in a slot so that the slot will be divided into smaller-width slot lines. Consequently, the efficiency in confining the electromagnetic field is improved, and conductor loss is minimized.
    Type: Grant
    Filed: March 6, 2001
    Date of Patent: December 9, 2003
    Assignee: Murata Manufactuing Co. Ltd
    Inventor: Kenichi Iio
  • Publication number: 20030137370
    Abstract: A dielectric resonator includes a slot line constructed by providing a slot electrode having a spiral slot at either an external face of a dielectric layer or inside the dielectric layer and a shielding conductor provided at a predetermined distance from the slot electrode. The slot line is employed as a resonant line so as to provide a dielectric resonator, an inductor, a capacitor, a dielectric filter, an oscillator, and/or a communication device.
    Type: Application
    Filed: February 6, 2003
    Publication date: July 24, 2003
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Yohei Ishikawa, Kenichi Iio, Hiroaki Tanaka, Yutaka Ida
  • Patent number: 6556107
    Abstract: A dielectric resonator includes a slot line constructed by providing a slot electrode having a spiral slot at either an external face of a dielectric layer or inside the dielectric layer and a shielding conductor provided at a predetermined distance from the slot electrode. The slot line is employed as a resonant line so as to provide a dielectric resonator, an inductor, a capacitor, a dielectric filter, an oscillator, and/or a communication device.
    Type: Grant
    Filed: April 12, 2002
    Date of Patent: April 29, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yohei Ishikawa, Kenichi Iio, Hiroaki Tanaka, Yutaka Ida
  • Patent number: 6535089
    Abstract: A high-frequency circuit device solves problems caused by a spurious mode reflection generated at a part where propagation of a spurious mode wave is prevented, with the result that propagation of the spurious mode wave such as a parallel plate mode wave is blocked. In the arrangement of the high-frequency circuit device, a leakage spurious mode wave radiates from a transmission line including at least two parallel planar conductors, and the leakage spurious mode wave is reflected by a spurious-mode reflection circuit disposed parallel to the transmission line. The distance between the transmission line and the spurious-mode reflection circuit is equivalent to the length in which a wave reflected by the spurious-mode reflection circuit is cancelled by the transmission line.
    Type: Grant
    Filed: June 5, 2000
    Date of Patent: March 18, 2003
    Assignee: Murata Manufacturing Co. Ltd.
    Inventor: Kenichi Iio
  • Patent number: 6515554
    Abstract: Electrodes are formed on both top and bottom surfaces of a dielectric plate and grounded coplanar lines, as transmission lines, are formed on the top surface of the dielectric plate. A plurality of micro-strip lines, each composed of high-impedance lines and low-impedance lines alternately connected in series, is arranged at a pitch shorter than the wavelength of a wave traveling along the grounded coplanar lines. A spurious mode propagation blocking circuit thus constructed prevents a spurious mode wave, such as a parallel-plate mode, from traveling.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: February 4, 2003
    Assignee: Murata Manufacturing Co. Ltd
    Inventors: Yohei Ishikawa, Kenichi Iio, Takatoshi Kato, Koichi Sakamoto
  • Patent number: 6504456
    Abstract: Electrodes are formed on the upper and under faces of a dielectric plate. For example, plural fundamental patterns having four ports and a quadrangular shape are arranged thereon. A strip conductor of a two-port circuit is determined so that adjacent two-port circuits of the respective fundamental patterns have a band-stop filter characteristic.
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: January 7, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenichi Iio, Yohei Ishikawa
  • Publication number: 20020140529
    Abstract: A dielectric resonator includes a slot line constructed by providing a slot electrode having a spiral slot at either an external face of a dielectric layer or inside the dielectric layer and a shielding conductor provided at a predetermined distance from the slot electrode. The slot line is employed as a resonant line so as to provide a dielectric resonator, an inductor, a capacitor, a dielectric filter, an oscillator, and/or a communication device.
    Type: Application
    Filed: April 12, 2002
    Publication date: October 3, 2002
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Yohei Ishikawa, Kenichi Iio, Hiroaki Tanaka, Yutaka Ida
  • Patent number: 6445255
    Abstract: A planar dielectric integrated circuit is provided such that energy conversion loss between a planar dielectric line and electronic components is small and that impedance matching between them can be easily obtained. A planar dielectric line is provided by causing two slots to oppose each other with a dielectric plate interposed in between, a slot line and line-conversion conductor patterns are provided in the end portions of the planar dielectric line, and an FET is disposed in such a manner as to be extended over the slot line.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: September 3, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yohei Ishikawa, Koichi Sakamoto, Sadao Yamashita, Kenichi Iio
  • Publication number: 20020089385
    Abstract: A planar dielectric integrated circuit is provided such that energy conversion loss between a planar dielectric line and electronic components is small and that impedance matching between them can be easily obtained. A planar dielectric line is provided by causing two slots to oppose each other with a dielectric plate interposed in between, a slot line and line-conversion conductor patterns are provided in the end portions of the planar dielectric line, and an FET is disposed in such a manner as to be extended over the slot line.
    Type: Application
    Filed: February 8, 2002
    Publication date: July 11, 2002
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Yohei Ishikawa, Koichi Sakamoto, Sadao Yamashita, Kenichi Iio
  • Patent number: 6414639
    Abstract: A resonance device with strengthened coupling between a resonator and a transmission line without reducing an unloaded Q of the resonator. The resonance device includes a micro-strip line as a transmission line, which has a dielectric substrate, a main conductor, and an earth conductor, both of which are formed on the dielectric substrate, and a resonator disposed near the main conductor of the micro-strip line to be electromagnetically coupled thereto. At a part of the main conductor of the micro-strip line where it is coupled to the resonator, an electrodeless portion such as a slit is formed in a direction substantially parallel to a signal-propagating direction.
    Type: Grant
    Filed: November 9, 1999
    Date of Patent: July 2, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Kenichi Iio
  • Patent number: 6411181
    Abstract: A dielectric resonator includes a slot line constructed by providing a slot electrode having a spiral slot at either an external face of a dielectric layer or inside the dielectric layer and a shielding conductor provided at a predetermined distance from the slot electrode. The slot line is employed as a resonant line so as to provide a dielectric resonator, an inductor, a capacitor, a dielectric filter, an oscillator, and/or a communication device.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: June 25, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yohei Ishikawa, Kenichi Iio, Hiroaki Tanaka, Yutaka Ida
  • Patent number: 6388541
    Abstract: There is provided a dielectric resonator which can suppress a spurious output acting as unnecessary resonance and can prevent the out-of-band characteristics of a filter from being degraded. Electrodes having circular openings are formed on a dielectric substrate, and the dielectric substrate is arranged between upper and lower conductive cases. A resonance region is used as a portion between the openings of the dielectric substrate, and columnar members consisting of a wave absorber are arranged between the upper and lower conductive cases.
    Type: Grant
    Filed: March 25, 1998
    Date of Patent: May 14, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Toshiro Hiratsuka, Tomiya Sonoda, Kenichi Iio