Patents by Inventor Kenichi Iwasaki
Kenichi Iwasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11985455Abstract: An OLT connected with a controller managing slices includes a bandwidth allocating unit capable of allocating bandwidths in a PON system to ONUs through allocation methods, a slice managing unit that calculates a guaranteed delay time for each allocation method, receives, from the controller, a resource reservation request including a bandwidth requested to be reserved in the PON system for a slice and a requested delay time, and determines an allocation method associated with the request based on the requested delay time and the guaranteed delay time for each allocation method, and a resource information generating unit that holds, as abstract resource information, an available bandwidth for the guaranteed delay times of each ONUs, calculates an available bandwidth in the allocation method of the associated ONU based on the allocation method associated with the request and the requested bandwidth, and updates and transmits the abstract resource information, to the controller.Type: GrantFiled: April 26, 2022Date of Patent: May 14, 2024Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Takeshi Suehiro, Kenichi Nakura, Akiko Iwasaki
-
Patent number: 11979335Abstract: A network controller is configured to perform, to a new slice request, resource allocation from a resource of unallocated resource information managed by a resource information management unit, and to reallocate the resource to an existing slice request so that an unallocated resource increases based on unallocated resource information managed by the resource information management unit.Type: GrantFiled: September 8, 2021Date of Patent: May 7, 2024Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Takeshi Suehiro, Yukio Hirano, Kenichi Nakura, Akiko Iwasaki, Hiromu Sato
-
Patent number: 11947275Abstract: Provided is an electrophotographic apparatus including: an electrophotographic photosensitive member; a voltage application unit configured to cause discharge from an electroconductive member to the electrophotographic photosensitive member; a charge transfer amount detection unit configured to detect a charge transfer amount per unit time resulting from the discharge from the electroconductive member to the electrophotographic photosensitive member; and a charging potential control unit, wherein V1 and V2 defined by specific procedures for the electrophotographic photosensitive member satisfy a relationship represented by the following expression (E-4): 100V1<V2?V1 (E-4), and wherein the charging potential control unit is configured to control the charging potential of the electrophotographic photosensitive member at the time of image formation.Type: GrantFiled: February 14, 2023Date of Patent: April 2, 2024Assignee: CANON KABUSHIKI KAISHAInventors: Shuhei Iwasaki, Kaname Watariguchi, Akihiro Maruyama, Kenichi Kaku, Michiyo Sekiya, Kohei Makisumi, Tatsuya Yamaai, Hideharu Shimozawa, Naoki Fukushima
-
Patent number: 10938051Abstract: A cell provided with a solid electrolyte layer (4) made from a ZrO2-based sintered member; an inter-connector layer (8) containing a La-containing perovskite composite oxide, including a pair of end portions of the inter-connector layer (8) covering a pair of end portions of the solid electrolyte layer (4); and constituting an annular member with the solid electrolyte layer (4); an outer electrode layer (6) disposed outward of the solid electrolyte layer (4); and an inner electrode layer (3) disposed inward of the solid electrolyte layer (4). In such a cell, the solid electrolyte layer (4) includes a first portion overlapping the pair of end portions of the inter-connector layer (8), and a second portion disposed between the outer electrode layer (6) and the inner electrode layer (3) and having an average thickness of 15 ?m or less. Additionally, the first portion is thicker than the second portion.Type: GrantFiled: January 29, 2015Date of Patent: March 2, 2021Assignee: KYOCERA CorporationInventor: Kenichi Iwasaki
-
Patent number: 9583777Abstract: A solid oxide fuel cell, a cell stack device, a fuel cell module and a fuel cell device are disclosed. The solid oxide fuel cell includes a solid electrolyte layer, fuel electrode layer and an oxygen electrode layer. The solid electrolyte layer has gas blocking properties and includes first and second main surfaces opposite to each other. The fuel electrode layer is disposed on the first main surface while the oxygen electrode layer is disposed on the second main surface of the solid electrolyte layer. A thickness of the solid electrolyte layer is 40 ?m or less. Porosity of the solid electrolyte layer in an arbitrary cross section thereof is 3 to 15% by area. An average pore diameter of pores in the solid electrolyte layer is 2 ?m or less.Type: GrantFiled: August 31, 2012Date of Patent: February 28, 2017Assignee: KYOCERA CORPORATIONInventors: Kenichi Iwasaki, Takayuki Iwamoto
-
Publication number: 20160351935Abstract: A cell provided with a solid electrolyte layer (4) made from a ZrO2-based sintered member; an inter-connector layer (8) containing a La-containing perovskite composite oxide, including a pair of end portions of the inter-connector layer (8) covering a pair of end portions of the solid electrolyte layer (4); and constituting an annular member with the solid electrolyte layer (4); an outer electrode layer (6) disposed outward of the solid electrolyte layer (4); and an inner electrode layer (3) disposed inward of the solid electrolyte layer (4). In such a cell, the solid electrolyte layer (4) includes a first portion overlapping the pair of end portions of the inter-connector layer (8), and a second portion disposed between the outer electrode layer (6) and the inner electrode layer (3) and having an average thickness of 15 ?m or less. Additionally, the first portion is thicker than the second portion.Type: ApplicationFiled: January 29, 2015Publication date: December 1, 2016Applicant: KYOCERA CorporationInventor: Kenichi IWASAKI
-
Patent number: 9117898Abstract: A processing method for a package substrate composed of a substrate, a plurality of device chips mounted on the substrate in a plurality of separate device regions defined by a plurality of crossing division lines, and a sealing layer for sealing the device chips. The processing method includes a cut mark forming step of moving a cutting blade to cut into the package substrate from the side of the substrate in the regions other than the device regions to the depth passing through the sealing layer, thereby forming a cut mark having a predetermined positional relation to the division lines, and a cutting step of cutting the package substrate from the side of the sealing layer along the division lines by using the cutting blade according to the cut mark after performing the cut mark forming step.Type: GrantFiled: November 26, 2014Date of Patent: August 25, 2015Assignee: Disco CorporationInventor: Kenichi Iwasaki
-
Publication number: 20150155205Abstract: A processing method for a package substrate composed of a substrate, a plurality of device chips mounted on the substrate in a plurality of separate device regions defined by a plurality of crossing division lines, and a sealing layer for sealing the device chips. The processing method includes a cut mark forming step of moving a cutting blade to cut into the package substrate from the side of the substrate in the regions other than the device regions to the depth passing through the sealing layer, thereby forming a cut mark having a predetermined positional relation to the division lines, and a cutting step of cutting the package substrate from the side of the sealing layer along the division lines by using the cutting blade according to the cut mark after performing the cut mark forming step.Type: ApplicationFiled: November 26, 2014Publication date: June 4, 2015Inventor: Kenichi Iwasaki
-
Publication number: 20140212786Abstract: A solid oxide fuel cell, a cell stack device, a fuel cell module and a fuel cell device are disclosed. The solid oxide fuel cell includes a solid electrolyte layer, fuel electrode layer and an oxygen electrode layer. The solid electrolyte layer has gas blocking properties and includes first and second main surfaces opposite to each other. The fuel electrode layer is disposed on the first main surface while the oxygen electrode layer is disposed on the second main surface of the solid electrolyte layer. A thickness of the solid electrolyte layer is 40 ?m or less. Porosity of the solid electrolyte layer in an arbitrary cross section thereof is 3 to 15% by area. An average pore diameter of pores in the solid electrolyte layer is 2 ?m or less.Type: ApplicationFiled: August 31, 2012Publication date: July 31, 2014Applicant: Kyocera CorporationInventors: Kenichi Iwasaki, Takayuki Iwamoto
-
Patent number: 7433173Abstract: Provided is a multilayer ceramic capacitor having a capacitor body formed by alternately laminating a dielectric layer and an internal electrode layer, and an external electrode formed on both ends of the capacitor body. The dielectric layer has at least two type of barium titanate crystal grains that differ from one another in at least one selected from Ca composition concentration, Sr composition concentration, and Zr composition concentration, and a grain boundary phase. If this multilayer ceramic capacitor employs, as a dielectric layer, a dielectric ceramic that contains barium titanate crystal grains in which part of Ba is substituted by Ca, Sr, or Zr, it is capable of suppressing the grain growth of crystal grains, and improving relative dielectric constant, temperature characteristic, and high-temperature load test characteristic, for example, in high-volume manufacturing using a tunnel type large kiln.Type: GrantFiled: November 22, 2005Date of Patent: October 7, 2008Assignee: Kyocera CorporationInventors: Kenichi Iwasaki, Daisuke Fukuda, Masahiro Nishigaki, Kiyoshi Matsubara, Kousei Kamigaki
-
Publication number: 20060148211Abstract: A wafer dividing method for cutting a wafer having devices which are composed of a laminate laminated on the front surface of a substrate with a cutting blade along a plurality of streets for sectioning the devices, comprising the steps of a groove forming step for forming two grooves deeper than the thickness of the laminate at an interval larger than the thickness of the cutting blade by applying a laser beam along the streets formed on the wafer; an alignment step for picking up an image of the two grooves formed in the streets of the wafer by the above groove forming step and positioning the cutting blade at the center position between the two grooves based on the image; and a cutting step for moving the cutting blade and the wafer relative to each other while the cutting blade is rotated to cut the wafer along the streets having the two grooves formed therein, after the above alignment step.Type: ApplicationFiled: January 4, 2006Publication date: July 6, 2006Inventors: Kenichi Iwasaki, Satoshi Genda, Toshio Tsuchiya
-
Publication number: 20060114641Abstract: Provided is a multilayer ceramic capacitor having a capacitor body formed by alternately laminating a dielectric layer and an internal electrode layer, and an external electrode formed on both ends of the capacitor body. The dielectric layer has at least two type of barium titanate crystal grains that differ from one another in at least one selected from Ca composition concentration, Sr composition concentration, and Zr composition concentration, and a grain boundary phase. If this multilayer ceramic capacitor employs, as a dielectric layer, a dielectric ceramic that contains barium titanate crystal grains in which part of Ba is substituted by Ca, Sr, or Zr, it is capable of suppressing the grain growth of crystal grains, and improving relative dielectric constant, temperature characteristic, and high-temperature load test characteristic, for example, in high-volume manufacturing using a tunnel type large kiln.Type: ApplicationFiled: November 22, 2005Publication date: June 1, 2006Inventors: Kenichi Iwasaki, Daisuke Fukuda, Masahiro Nishigaki, Kiyoshi Matsubara, Kousei Kamigaki
-
Publication number: 20050181951Abstract: To provide a method for irradiating ultra-violet rays a water retention member added with water droplets, generating OH radical in the water droplets and modifying ethylene gas into ethane and water through the OH radical. Water is supplied to the aeration water retention member formed with a water retention surface capable of holding water in its particle shape in such a way that the water is held on it under particle shape to cause the water retention surface to be kept in a state where the water retention surface is wetted with water droplets. Utra-violet rays are irradiated water held on the water retention surface and then the OH radicals are generated in the water droplets with energy of irradiated ultra-violet rays. Gas containing ethylene gas is aerated the water retention surface holding water containing the OH radicals and the ethylene gas contacted under an action of the OH radicals is modified into ethane and water.Type: ApplicationFiled: February 14, 2005Publication date: August 18, 2005Inventors: Kenichi Iwasaki, Takeshi Nagasawa
-
Patent number: 6732610Abstract: The XY stage mechanism comprises a Y slide shaft 2 penetrating through only one side surface of the wall surfaces of a vacuum chamber 1 for holding a stage base plate in a cantilevered manner, a Y air slide bearing 4 for guiding the Y slide shaft 2, an X air slide plate 5, a first air slide bearing 6 for supporting the X air slide plate 5, a coupling portion 8, and a second X air slide bearing 9 serving as the guide of the coupling portion 8, whereby, in a state where not only the Y slide shaft is floated up but also the X air slide plate and coupling portion are floated up, the XY stage is driven.Type: GrantFiled: November 20, 2002Date of Patent: May 11, 2004Assignee: Kyocera CorporationInventors: Akira Higuchi, Takayuki Kato, Kenichi Iwasaki
-
Publication number: 20030094059Abstract: The XY stage mechanism comprises a Y slide shaft 2 penetrating through only one side surface of the wall surfaces of a vacuum chamber 1 for holding a stage base plate in a cantilevered manner, a Y air slide bearing 4 for guiding the Y slide shaft 2, an X air slide plate 5, a first air slide bearing 6 for supporting the X air slide plate 5, a coupling portion 8, and a second X air slide bearing 9 serving as the guide of the coupling portion 8, whereby, in a state where not only the Y slide shaft is floated up but also the X air slide plate and coupling portion are floated up, the XY stage is driven.Type: ApplicationFiled: November 20, 2002Publication date: May 22, 2003Applicant: KYOCERA CorporationInventors: Akira Higuchi, Takayuki Kato, Kenichi Iwasaki
-
Patent number: 6510755Abstract: The XY stage mechanism comprises a Y slide shaft 2 penetrating through only one side surface of the wall surfaces of a vacuum chamber 1 for holding a stage base plate in a cantilevered manner, a Y air slide bearing 4 for guiding the Y slide shaft 2, an X air slide plate 5, a first air slide bearing 6 for supporting the X air slide plate 5, a coupling portion 8, and a second X air slide bearing 9 serving as the guide of the coupling portion 8, whereby, in a state where not only the Y slide shaft is floated up but also the X air slide plate and coupling portion are floated up, the XY stage is driven.Type: GrantFiled: July 26, 2000Date of Patent: January 28, 2003Assignee: Kyocera CorporationInventors: Akira Higuchi, Takayuki Kato, Kenichi Iwasaki
-
Patent number: 6011898Abstract: The present invention has as its object to reduce the time and and effort in the work of finding a portion necessary for editing work from a video signal recorded on a video tape. A VTR apparatus (12) reproduces a video signal and sampling data showing the start and end of the shot from a video tape (120). A VP circuit (22) reduces the size of the video signal. A detection circuit (24) detects the boundaries of scenes or important portions based on the reproduced sampling data. The sampling memory (30) samples and records the video signal reduced by the VP circuit (22) at a timing of detection of the boundaries of the scene or important portions by the detection apparatus (24). A display device (34) displays the video signal stored in the sampling memory (30) in a predetermined array along with a time code etc.Type: GrantFiled: July 25, 1997Date of Patent: January 4, 2000Assignee: Sony CorporationInventors: Kenichi Iwasaki, Mitsugu Yoshihiro, Hirofumi Murakami, Noboru Yanagita