Patents by Inventor Kenichi Nagasue

Kenichi Nagasue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220261282
    Abstract: An information processing apparatus includes a memory, and a processor coupled to the memory and configured to classify tasks for data collection into groups, the tasks each being for a corresponding one of a plurality of devices, allocate, for each of the groups, each of first values of which an accumulated value for all of the tasks in the group is equal to a predetermined value, to each of the tasks in the group, accumulate, for each of the groups, the first value allocated to the task in a case where data that corresponds to the task is received from the device, and update states of the tasks in the group to a completed state in a case where the accumulated value for the group is equal to the predetermined value.
    Type: Application
    Filed: November 12, 2021
    Publication date: August 18, 2022
    Applicant: FUJITSU LIMITED
    Inventors: Kenichi Nagasue, Kouichirou Amemiya
  • Publication number: 20220138009
    Abstract: A method, an apparatus and a medium storing a program for controlling information processing apparatus that manages a plurality of processing nodes each including a buffer and a processor that processes data held in the buffer is disclosed. The method includes predicting a boundary between processed data and unprocessed data in the buffer at a predicted reaching time at which a resource load of a certain processing node during data processing will reach a predetermined amount; and transferring, in reverse processing order toward the boundary, the unprocessed data to another processing node that will take over the data processing.
    Type: Application
    Filed: September 2, 2021
    Publication date: May 5, 2022
    Applicant: FUJITSU LIMITED
    Inventors: Kenichi NAGASUE, Kento IKKAKU
  • Publication number: 20220058055
    Abstract: A task control apparatus includes: a memory; and a processor coupled to the memory and configured to: assign, to each request for data collection, an index based on acceptance time and a delay period allowable in data collection; input the request to a queue in order of the index; extract, in a case where a transmission timing of data collection of the request is to be delayed, the request from the queue; and re-input the request to the queue by using an index based on a period for which the transmission timing is to be delayed and an extraction pace at which requests are extracted from the queue.
    Type: Application
    Filed: May 27, 2021
    Publication date: February 24, 2022
    Applicant: FUJITSU LIMITED
    Inventors: Kouichirou AMEMIYA, Kento Ikkaku, MIHO KAWANO, Kenichi Nagasue