Patents by Inventor Kenichi Shibayashi

Kenichi Shibayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060181307
    Abstract: A semiconductor integrated circuit includes a plurality of rows of wired standard cells formed on a semiconductor substrate. The wires standard cells are wired to provide a desired function. Spare standard cells are also formed in each of the plurality of rows in an area in which the wired standard cells are not formed, but are not wired in an initial design. When a change of the function is required, the spare standard cells are wired to achieve a desired additional function. Two power supply lines extend in a direction in which the wired standard cells and spare standard cells are aligned. The wired standard cells and spare standard cells are located between the first power supply line and the second power supply line. Each of the spare standard cells includes a plurality of electrically isolated transistors that may be combined to implement a logic function.
    Type: Application
    Filed: February 2, 2006
    Publication date: August 17, 2006
    Inventors: Kenichi Shibayashi, Hidekazu Kikuchi