Patents by Inventor Kenichi Shiibayashi

Kenichi Shiibayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11862070
    Abstract: A source driver includes: a first gradation voltage generation unit generating a gradation voltage of a first polarity supplied to a pixel on a first source line; a first amplifier receiving the gradation voltage of the first polarity to an input end, amplifying it, and outputting a voltage from an output end; a second gradation voltage generation unit generating a gradation voltage of a second polarity opposite to the first polarity to be supplied to a pixel on a second source line provided in the vicinity of the first source line; a second amplifier receiving the gradation voltage of the second polarity to an input end, amplifying it, and outputting a voltage from an output end; and a voltage comparison unit comparing a voltage of the input end of the second amplifier with the voltage of the output end of the second amplifier and outputs a comparison result.
    Type: Grant
    Filed: March 13, 2022
    Date of Patent: January 2, 2024
    Assignee: LAPIS Technology Co., Ltd.
    Inventors: Kenichi Shiibayashi, Kenichi Shigeta
  • Patent number: 11741915
    Abstract: The disclosure includes bus wiring constituted by wiring lines; a gradation voltage generation circuit that generates M gradation voltages representing brightness levels with M gradations, and applies the M gradation voltages to an intermediate portion on M wiring lines belonging to the bus wiring; a plurality of decoders, each of which receives M gradation voltages via the M wiring lines and selects one of the M gradation voltages according to the pixel data pieces to output the selected gradation voltage; a plurality of output amplifiers that individually amplifies the voltages output from the plurality of decoders and generates the amplified voltages as the plurality of pixel drive voltages; and first and second inter-gradation short circuits that short-circuit one ends of each of the M wiring lines and the other ends of each of the M wiring lines according to a load signal for capturing the pixel data pieces.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: August 29, 2023
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenichi Shiibayashi, Keigo Otani
  • Publication number: 20230260476
    Abstract: A ladder resistor circuit includes a ladder resistor including first to k-th resistors connected in series and outputting a plurality of voltages by receiving a first potential and a second potential, a first correction resistor that has a resistance value equal to a series total resistance value of a resistor group constituted of first to r-th resistors among the first to k-th resistors, a second correction resistor that has a resistance value equal to a series total resistance value of a resistor group constituted of (r+1)-th to k-th resistors, and an amplifier that receives a potential of a connection point between the first and second correction resistors at an input terminal thereof, and has an output terminal thereof connected to a connection point between the r-th and (r+1)-th resistors.
    Type: Application
    Filed: February 10, 2023
    Publication date: August 17, 2023
    Applicant: LAPIS Technology Co., Ltd.
    Inventor: Kenichi SHIIBAYASHI
  • Publication number: 20220319403
    Abstract: A source driver includes: a first gradation voltage generation unit generating a gradation voltage of a first polarity supplied to a pixel on a first source line; a first amplifier receiving the gradation voltage of the first polarity to an input end, amplifying it, and outputting a voltage from an output end; a second gradation voltage generation unit generating a gradation voltage of a second polarity opposite to the first polarity to be supplied to a pixel on a second source line provided in the vicinity of the first source line; a second amplifier receiving the gradation voltage of the second polarity to an input end, amplifying it, and outputting a voltage from an output end; and a voltage comparison unit comparing a voltage of the input end of the second amplifier with the voltage of the output end of the second amplifier and outputs a comparison result.
    Type: Application
    Filed: March 13, 2022
    Publication date: October 6, 2022
    Applicant: LAPIS Technology Co., Ltd.
    Inventors: Kenichi SHIIBAYASHI, Kenichi SHIGETA
  • Publication number: 20220293063
    Abstract: The disclosure includes bus wiring constituted by wiring lines; a gradation voltage generation circuit that generates M gradation voltages representing brightness levels with M gradations, and applies the M gradation voltages to an intermediate portion on M wiring lines belonging to the bus wiring; a plurality of decoders, each of which receives M gradation voltages via the M wiring lines and selects one of the M gradation voltages according to the pixel data pieces to output the selected gradation voltage; a plurality of output amplifiers that individually amplifies the voltages output from the plurality of decoders and generates the amplified voltages as the plurality of pixel drive voltages; and first and second inter-gradation short circuits that short-circuit one ends of each of the M wiring lines and the other ends of each of the M wiring lines according to a load signal for capturing the pixel data pieces.
    Type: Application
    Filed: May 31, 2022
    Publication date: September 15, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenichi SHIIBAYASHI, KEIGO OTANI
  • Publication number: 20220246109
    Abstract: A voltage generation unit includes first to k-th amplifiers that individually receiving first to k-th reference voltages having mutually different voltage values, individually amplify these reference voltages with gain 1, and output the reference voltages. The generation unit generates plural gradation voltages by dividing voltages between respective voltages output from the first to k-th amplifiers. A decoder unit selects one gradation voltage corresponding to the luminance level represented by the pixel data piece among the gradation voltages and generates a signal having the one gradation voltage as the drive signal for driving a display device. Each amplifier includes a response-speed increase circuit that includes at least one transistor in which a source and a back gate are connected to an output terminal of the amplifier, a predetermined electric potential is applied to a drain, and the reference voltage received by the amplifier is received at a gate.
    Type: Application
    Filed: June 17, 2020
    Publication date: August 4, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Kenichi SHIIBAYASHI
  • Patent number: 11373616
    Abstract: The disclosure includes bus wiring constituted by wiring lines; a gradation voltage generation circuit that generates M gradation voltages representing brightness levels with M gradations, and applies the M gradation voltages to an intermediate portion on M wiring lines belonging to the bus wiring; a plurality of decoders, each of which receives M gradation voltages via the M wiring lines and selects one of the M gradation voltages according to the pixel data pieces to output the selected gradation voltage; a plurality of output amplifiers that individually amplifies the voltages output from the plurality of decoders and generates the amplified voltages as the plurality of pixel drive voltages; and first and second inter-gradation short circuits that short-circuit one ends of each of the M wiring lines and the other ends of each of the M wiring lines according to a load signal for capturing the pixel data pieces.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: June 28, 2022
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenichi Shiibayashi, Keigo Otani
  • Patent number: 11094272
    Abstract: A display driver according to the present invention includes a withstand voltage protection part that precharges an output node of a polarity changeover switch circuit that switches a polarity of a drive signal supplied to a display device from an electric potential of a positive polarity (a first electric potential to a third electric potential) to an electric potential of a negative polarity (the third electric potential to a second electric potential) or vice versa to the third electric potential immediately before the polarity switching.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: August 17, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Kenichi Shiibayashi
  • Publication number: 20210174760
    Abstract: The disclosure includes bus wiring constituted by wiring lines; a gradation voltage generation circuit that generates M gradation voltages representing brightness levels with M gradations, and applies the M gradation voltages to an intermediate portion on M wiring lines belonging to the bus wiring; a plurality of decoders, each of which receives M gradation voltages via the M wiring lines and selects one of the M gradation voltages according to the pixel data pieces to output the selected gradation voltage; a plurality of output amplifiers that individually amplifies the voltages output from the plurality of decoders and generates the amplified voltages as the plurality of pixel drive voltages; and first and second inter-gradation short circuits that short-circuit one ends of each of the M wiring lines and the other ends of each of the M wiring lines according to a load signal for capturing the pixel data pieces.
    Type: Application
    Filed: December 3, 2020
    Publication date: June 10, 2021
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenichi SHIIBAYASHI, KEIGO OTANI
  • Publication number: 20210012731
    Abstract: A display driver according to the present invention includes a withstand voltage protection part that precharges an output node of a polarity changeover switch circuit that switches a polarity of a drive signal supplied to a display device from an electric potential of a positive polarity (a first electric potential to a third electric potential) to an electric potential of a negative polarity (the third electric potential to a second electric potential) or vice versa to the third electric potential immediately before the polarity switching.
    Type: Application
    Filed: July 7, 2020
    Publication date: January 14, 2021
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Kenichi SHIIBAYASHI
  • Patent number: 10650771
    Abstract: Provided is an output amplifier including a differential unit which sends a current corresponding to a voltage difference between a gradation voltage and an amplified gradation voltage to a first current line; a current mirror unit which sends an amount of current corresponding to the current flowing through the first current line, to a second current line; and an output unit including a first and a second drive line, an output line through which the amplified gradation voltage is output, a first output transistor which sends a current based on a voltage of the first drive line, and a second output transistor which sends a current based on a voltage of the second drive line. The output unit includes a voltage regulation circuit which controls the voltage of the first drive line being higher than the voltage of the second drive line.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: May 12, 2020
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Kenichi Shiibayashi
  • Patent number: 10607560
    Abstract: A semiconductor device for driving a load of an object includes a differential circuit receiving an input signal and outputting differential output signals, first to fourth output circuits receiving the differential output signals, and a control circuit configured to respectively connect or disconnect the differential circuit to each of the first to fourth output circuits. The first output circuit is connected between high-level and mid-level power supply terminals and outputs a first output signal to the differential circuit, the second output circuit is connected between the high-level and mid-level power supply terminals, and outputs a second output signal to the load, a third output circuit is connected between mid-level and low-level power supply terminals, and outputs a third output signal to the differential circuit, and a fourth output circuit is connected between the mid-level low-level power supply terminals, and outputs a fourth output signal to the load.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: March 31, 2020
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Hiroshi Tsuchi, Kenichi Shiibayashi
  • Patent number: 10446109
    Abstract: A display driver includes: a plurality of decoders that converts a plurality of pixel data pieces representing luminance levels for pixels into gradation voltages having magnitudes corresponding to the luminance levels represented by the pixel data pieces, respectively; a plurality of amplifiers that provides a plurality of driving voltages obtained by amplifying the gradation voltages to a plurality of data lines of a display device, respectively; and a reference gradation voltage generator that generates a plurality of reference gradation voltages having respective different voltage values corresponding to gradation levels. Each of the decoders includes a short-circuiting control circuit that controls whether to short-circuit between a first line and a second line of each of the decoders.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: October 15, 2019
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Kenichi Shiibayashi
  • Patent number: 10290279
    Abstract: An amplifier feeds a current corresponding to a difference between a gradation voltage corresponding to a luminance level in a video signal and an amplified gradation voltage obtained by amplifying such a gradation voltage through an output current line in a current mirror circuit, and provides a voltage on the output current line to an output part via a driving line. The output part generates the amplified gradation voltage on the output line by feeding a current according to a voltage on the driving line through the output line.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: May 14, 2019
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Kenichi Shiibayashi
  • Patent number: 10199000
    Abstract: A source driver IC chip, designed to prevent flicker in images displayed on a display panel while suppressing power consumption and heat generation, includes: a reference gradation voltage generating part (220) configured to generate a reference gradation voltage based on a first or second gamma characteristic of the display panel, using first and second power supply voltages (VH) and (VL) inputted through first and second external terminals (PA2, PA3); and a third external terminal (PA4) for externally outputting said reference gradation voltage. The source driver IC chip further includes first and second gradation voltage generating parts configured to generate first and second gradation voltages respectively, using a reference gradation voltage based on a first gamma characteristic inputted through a fourth external terminal and a reference gradation voltage having a second gamma characteristic inputted through a fifth external terminal respectively.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: February 5, 2019
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenichi Shiibayashi, Koji Higuchi, Atsushi Hirama
  • Publication number: 20190012980
    Abstract: Provided is an output amplifier including a differential unit which sends a current corresponding to a voltage difference between a gradation voltage and an amplified gradation voltage to a first current line; a current mirror unit which sends an amount of current corresponding to the current flowing through the first current line, to a second current line; and an output unit including a first and a second drive line, an output line through which the amplified gradation voltage is output, a first output transistor which sends a current based on a voltage of the first drive line, and a second output transistor which sends a current based on a voltage of the second drive line. The output unit includes a voltage regulation circuit which controls the voltage of the first drive line being higher than the voltage of the second drive line.
    Type: Application
    Filed: July 3, 2018
    Publication date: January 10, 2019
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Kenichi SHIIBAYASHI
  • Publication number: 20180342223
    Abstract: An amplifier feeds a current corresponding to a difference between a gradation voltage corresponding to a luminance level in a video signal and an amplified gradation voltage obtained by amplifying such a gradation voltage through an output current line in a current mirror circuit, and provides a voltage on the output current line to an output part via a driving line. The output part generates the amplified gradation voltage on the output line by feeding a current according to a voltage on the driving line through the output line.
    Type: Application
    Filed: August 3, 2018
    Publication date: November 29, 2018
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Kenichi SHIIBAYASHI
  • Publication number: 20180336862
    Abstract: A semiconductor device for driving a load of an object includes a differential circuit receiving an input signal and outputting differential output signals, first to fourth output circuits receiving the differential output signals, and a control circuit configured to respectively connect or disconnect the differential circuit to each of the first to fourth output circuits. The first output circuit is connected between high-level and mid-level power supply terminals and outputs a first output signal to the differential circuit, the second output circuit is connected between the high-level and mid-level power supply terminals, and outputs a second output signal to the load, a third output circuit is connected between mid-level and low-level power supply terminals, and outputs a third output signal to the differential circuit, and a fourth output circuit is connected between the mid-level low-level power supply terminals, and outputs a fourth output signal to the load.
    Type: Application
    Filed: May 17, 2018
    Publication date: November 22, 2018
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Hiroshi TSUCHI, Kenichi SHIIBAYASHI
  • Patent number: 10062351
    Abstract: An amplifier feeds a current corresponding to a difference between a gradation voltage corresponding to a luminance level in a video signal and an amplified gradation voltage obtained by amplifying such a gradation voltage through an output current line in a current mirror circuit, and provides a voltage on the output current line to an output part via a driving line. The output part generates the amplified gradation voltage on the output line by feeding a current according to a voltage on the driving line through the output line.
    Type: Grant
    Filed: November 17, 2016
    Date of Patent: August 28, 2018
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Kenichi Shiibayashi
  • Publication number: 20180061359
    Abstract: A display driver includes: a plurality of decoders that converts a plurality of pixel data pieces representing luminance levels for pixels into gradation voltages having magnitudes corresponding to the luminance levels represented by the pixel data pieces, respectively; a plurality of amplifiers that provides a plurality of driving voltages obtained by amplifying the gradation voltages to a plurality of data lines of a display device, respectively; and a reference gradation voltage generator that generates a plurality of reference gradation voltages having respective different voltage values corresponding to gradation levels.
    Type: Application
    Filed: August 30, 2017
    Publication date: March 1, 2018
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Kenichi SHIIBAYASHI