Patents by Inventor Kenichiro Suetsugu

Kenichiro Suetsugu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6607116
    Abstract: There is provided a method which can conveniently estimate a quality of a lead-free solder material used for a flow soldering process. In the present invention, a differential thermal analysis curve of a sample of the lead-free solder material is obtained by utilizing a differential thermal analysis method, and thereby a quality of the lead-free solder material used for a flow soldering process is estimated based on the obtained differential thermal analysis curve.
    Type: Grant
    Filed: June 6, 2001
    Date of Patent: August 19, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenichiro Suetsugu, Shunji Hibino, Yukio Maeda, Shoshi Kabashima, Mikiya Nakata
  • Publication number: 20020187689
    Abstract: A connection structure of the present invention has a board with a through hole perforating therethrough, a land formed around the through hole, and a lead extending from an electronic component and disposed in the through hole. The land includes a wall surface land portion formed on a wall surface of the through hole, and front and back surface land portions formed on the front and back surfaces of the board respectively. A fillet connecting the land and the lead includes upper and lower fillet portions respectively contacting with the front and back surface land portions. A profile of the upper fillet portion is smaller than that of the lower fillet portion and is not smaller than that of the through hole. Therefore, occurrence of lift-off is effectively reduced while using a lead-free solder material.
    Type: Application
    Filed: February 4, 2002
    Publication date: December 12, 2002
    Inventors: Kenichiro Suetsugu, Masuo Suetsugu, Kenichiro Todoroki, Shunji Hibino, Hiroaki Takano, Mikiya Nakata, Yukio Maeda
  • Publication number: 20020179693
    Abstract: There is provided a flow soldering process for mounting an electronic component onto a board by a solder material, which process is appropriate for using a lead-free solder material as the solder material.
    Type: Application
    Filed: May 24, 2002
    Publication date: December 5, 2002
    Inventors: Yasuji Kawashima, Kenichiro Suetsugu, Shunji Hibino, Hiroaki Takano, Tatsuo Okuji, Shoshi Kabashima, Yukio Maeda, Mikiya Nakata
  • Publication number: 20020179690
    Abstract: It is realized that a solder material is sufficiently supplied to a through hole formed through a board by a spraying mode flux applying method in a flow soldering process for mounting an electronic component onto the board by means of a solder material.
    Type: Application
    Filed: May 24, 2002
    Publication date: December 5, 2002
    Inventors: Yasuji Kawashima, Kenichiro Suetsugu, Shunji Hibino, Hiroaki Takano, Tatsuo Okuji, Shoshi Kabashima, Yukio Maeda, Mikiya Nakata
  • Patent number: 6428745
    Abstract: Disclosed are a solder and a solder paste used for soldering an electronic part to a circuit board. This solder comprises 2.0 to 3.5 wt % of Ag, 5 to 18 wt % of Bi and Sn for the rest. Alternatively, it further contains at least one element selected from the group consisting of 0.1 to 1.5 wt % of In, 0.1 to 0.7 wt % of Cu and 0.1 to 10 wt % of Zn.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: August 6, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Atsushi Yamaguchi, Tetsuo Fukushima, Kenichiro Suetsugu, Akio Furusawa
  • Publication number: 20020022000
    Abstract: There is provided a connecting material which can form a detachable connecting structure. According to the connecting material, the connecting portion between a certain object and other object can be more readily formed, and said certain object can be more readily detached from said other object after the formation of the connecting portion.
    Type: Application
    Filed: July 13, 2001
    Publication date: February 21, 2002
    Inventors: Kenichiro Suetsugu, Takaharu Gamo, Shunji Hibino, Yoshio Morita, Mikiya Nakata
  • Publication number: 20020000460
    Abstract: There is provided a method which can conveniently estimate a quality of a lead-free solder material used for a flow soldering process.
    Type: Application
    Filed: June 6, 2001
    Publication date: January 3, 2002
    Inventors: Kenichiro Suetsugu, Shunji Hibino, Yukio Maeda, Shoshi Kabashima, Mikiya Nakata
  • Patent number: 6325279
    Abstract: A lead-free solder alloy of electrode for joining electronic parts fine in texture and excellent in thermal fatigue resistant characteristic is presented. This is a solder alloy of electrode for joining electronic parts comprising Sn, Ag and Cu as principal components, and more particularly a solder alloy of electrode for joining electronic parts containing 92 to 97 wt. % of Sn, 3.0 to 6.0 wt. % of Ag, and 0.1 to 2.0 wt. % of Cu. By adding a small amount of Ag to the solder mainly composed of Sn, a fine alloy texture is formed, and texture changes are decreased, so that an alloy excellent in thermal fatigue resistance is obtained. Further, by adding a small amount of Cu, an intermetallic compound is formed, and the junction strength is improved.
    Type: Grant
    Filed: May 10, 2000
    Date of Patent: December 4, 2001
    Assignee: Matsushita Electric Industrial, Co., Ltd.
    Inventors: Yoshinori Sakai, Kenichiro Suetsugu, Atsushi Yamaguchi
  • Publication number: 20010025875
    Abstract: Disclosed are a solder and a solder paste used for soldering an electronic part to a circuit board. This solder comprises 2.0 to 3.5 wt % of Ag, 5 to 18 wt % of Bi and Sn for the rest. Alternatively, it further contains at least one element selected from the group consisting of 0.1 to 1.5 wt % of In, 0.1 to 0.7 wt % of Cu and 0.1 to 10 wt % of Zn.
    Type: Application
    Filed: May 16, 2001
    Publication date: October 4, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Atsushi Yamaguchi, Tetsuo Fukushima, Kenichiro Suetsugu, Akio Furusawa
  • Publication number: 20010018030
    Abstract: Disclosed are a solder and a solder paste used for soldering an electronic part to a circuit board. This solder comprises 2.0 to 3.5 wt % of Ag, 5 to 18 wt % of Bi and Sn for the rest. Alternatively, it further contains at least one element selected from the group consisting of 0.1 to 1.5 wt % of In, 0.1 to 0.7 wt % of Cu and 0.1 to 10 wt % of Zn.
    Type: Application
    Filed: March 28, 2001
    Publication date: August 30, 2001
    Applicant: Matsushita Electic Industrial Co., Ltd.
    Inventors: Atsushi Yamaguchi, Tetsuo Fukushima, Kenichiro Suetsugu, Akio Furusawa
  • Patent number: 6267823
    Abstract: Disclosed are a solder and a solder paste used for soldering an electronic part to a circuit board. This solder comprises 2.0 to 3.5 wt % of Ag, 5 to 18 wt % of Bi and Sn for the rest. Alternatively, it further contains at least one element selected from the group consisting of 0.1 to 1.5 wt % of In, 0.1 to 0.7 wt % of Cu and 0.1 to 10 wt % of Zn.
    Type: Grant
    Filed: November 12, 1998
    Date of Patent: July 31, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Atsushi Yamaguchi, Tetsuo Fukushima, Kenichiro Suetsugu, Akio Furusawa
  • Patent number: 6077477
    Abstract: A lead-free solder alloy of electrode for joining electronic parts fine in texture and excellent in thermal fatigue resistant characteristic is presented. This is a solder alloy for joining electronic parts comprising Sn, Ag, Bi, Cu and In as principal components, and more particularly a solder alloy of electrode for joining electronic parts containing 81 to 91 wt. % of Sn, 3.0 to 6.0 wt. % of Ag, and 0.1 to 2.0 wt. % of Cu. By adding a small amount of Ag to the solder mainly composed of Sn, a fine alloy texture is formed, and texture changes are decreased, so that an alloy excellent in thermal fatigue resistance is obtained. Further, by adding a small amount of Cu, an intermetallic compound is formed, and the junction strength is improved.
    Type: Grant
    Filed: February 5, 1998
    Date of Patent: June 20, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshinori Sakai, Kenichiro Suetsugu, Atsushi Yamaguchi
  • Patent number: 6074894
    Abstract: A bump electrode made of an alloy of two or more kinds of metals is formed on an electrode pad portion of a semiconductor device by the laser ablation method and the bump electrode is reflow-soldered to electrically bond the bump electrode to a terminal electrode section on a circuit board. The semiconductor device and the terminal electrode section are encapsulated in resin by the laser ablation method.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: June 13, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenichiro Suetsugu, Atsushi Yamaguchi
  • Patent number: 6052893
    Abstract: The present invention provides a method of manufacturing a small electronic component, by which its yield can be enhanced. The invention comprises the steps of: a component mounting step of mounting a necessary electronic component 2-4 on a substrate 1; a coating layer forming step of forming a coating layer 14 for covering and sealing the substrate 1 in its entirety including the electronic component 2-4 with a coating material having high heat resistance; and a package layer forming step of forming a package layer 17 for covering and sealing a circumference of the coating layer 14 with a thermoplastic resin material 12. In the package layer forming step, adverse effects by the heat from the thermoplastic resin 12 to the electronic components 2-4 and the substrate 1 are inhibited with the coating layer 14.
    Type: Grant
    Filed: June 3, 1998
    Date of Patent: April 25, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichi Yoshida, Tetsuo Fukushima, Kenichiro Suetsugu
  • Patent number: 5962133
    Abstract: The occurrence of partial chip detachment is reduced by improving wettability for increasing the bonding strength, and by enabling gradual melting of the solder. Solder material, electronic components, and electronic circuit boards with higher performance and higher reliability are offered. The surface of a solder core, lead-frame surface and electrode surface of electronic components, and copper (Cu) land surface of electronic circuit boards are coated with metal element, which is either indium (In) or bismuth (Bi).
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: October 5, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Atsushi Yamaguchi, Kenichiro Suetsugu, Tetsuo Fukushima, Akio Furusawa
  • Patent number: 5858481
    Abstract: An electronic circuit substrate is sealed with a sealing material made of thermoplastic resin having a thermal-expansion coefficient close to that of a ceramic substrate by a compound filler dispersedly mixed in the sealing material. The filler includes at least two of milled fiber, glass fiber, and flaked filler.
    Type: Grant
    Filed: January 30, 1997
    Date of Patent: January 12, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tetsuo Fukushima, Koichi Yoshida, Kenichiro Suetsugu
  • Patent number: 5743007
    Abstract: A method for mounting on integrated circuit having many leads with narrow pitches on the printed circuit board. In a method, a resist layer is formed between lands on the board, and solder paste is applied with a stencil to the lands so that the positions of the solder paste on the lands are staggered. Then, leads of the integrated circuit are positioned on the lands. Then, reflow soldering of the leads to the lands is performed with the solder paste in a nitrogen environment. In a different embodiment, each land includes a first portion and a second portion having a width narrower than the first portion, and the second portions are arranged staggeredly among the lands. Then, solder paste is applied to the first portions having the wider width. Then, reflow soldering of the leads to the lands is performed with the solder paste in a nitrogen environment. If solder including bismuth is used, reflow soldering can be performed in ambient environment.
    Type: Grant
    Filed: January 17, 1996
    Date of Patent: April 28, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroaki Onishi, Haruto Nagata, Masato Hirano, Kenichiro Suetsugu
  • Patent number: 5498575
    Abstract: A method of mounting electronic components on circuit boards, which includes the steps of obtaining a bonding film member by filling bonding material into openings in a predetermined pattern of an electrically-insulating and heat-proof film and holding the bonding material in the openings by a flux layer laminated on one surface of the film, overlaying the bonding material of the bonding film member onto conductive layers of a circuit board by supplying the bonding film member onto the circuit board, superposing electrodes of electronic components onto the bonding material of the bonding film member by supplying the electronic components onto the bonding film member, and melting the bonding material by heating the circuit board.
    Type: Grant
    Filed: June 22, 1994
    Date of Patent: March 12, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroaki Onishi, Kenichiro Suetsugu
  • Patent number: 5198655
    Abstract: An image reading device includes: a light emitting element for irradiating light on an image surface; a light receiving element for receiving image information in the form of reflected light from the image surface; and light waveguide passages provided between the light emitting element and the image surface and between the light receiving element and the image surface, respectively, and at least the light waveguide passage for the light emitting element is widened at an end surface thereof at the image surface to a width wider than at the end surface at the light emitting element.
    Type: Grant
    Filed: January 15, 1991
    Date of Patent: March 30, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenichiro Suetsugu, Tetsuo Fukushima, Tokuhito Hamane, Junji Ikeda, Yukio Maeda
  • Patent number: 5136150
    Abstract: Disclosed is an image sensor including a circuit board, an array of light emitting elements for emitting light to an image plane, an array of light receiving elements for receiving image information transmitted by reflected light from the image plane, and plural pairs of light wave guides interposed between the light emitting elements and the image plane and between the image plane and the light receiving elements. Both the light emitting elements and the light receiving elements are mounted on the same surface of the circuit board.
    Type: Grant
    Filed: December 26, 1990
    Date of Patent: August 4, 1992
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tetsuo Fukushima, Kenichiro Suetsugu, Tokuhito Hamane, Junji Ikeda, Yukio Maeda