Patents by Inventor Kenichiro Tsubone

Kenichiro Tsubone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9117788
    Abstract: A method of repairing a semiconductor device includes turning a press member to apply pressure on an electronic component which is mounted on a substrate. A heat sink which is provided on the electronic component via a bonding layer is thus displaced with respect to the electronic component in a transverse direction. The heat sink is removed from the electronic component by shearing the bonding layer with the press member.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: August 25, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Tsuyoshi Yamamoto, Naoaki Nakamura, Rie Takada, Kenichiro Tsubone, Yasuhide Kuroda, Harumi Yagi
  • Publication number: 20120024512
    Abstract: A method of repairing a semiconductor device includes turning a press member to apply pressure on an electronic component which is mounted on a substrate. A heat sink which is provided on the electronic component via a bonding layer is thus displaced with respect to the electronic component in a transverse direction. The heat sink is removed from the electronic component by shearing the bonding layer with the press member.
    Type: Application
    Filed: July 18, 2011
    Publication date: February 2, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Tsuyoshi Yamamoto, Naoaki Nakamura, Rie Takada, Kenichiro Tsubone, Yosuhide Kuroda, Harumi Yagi
  • Publication number: 20110007482
    Abstract: A printed circuit board unit includes a printed circuit board including through holes arranged in a grid array on which an integrated circuit is mounted; and a flexible substrate provided on a back side of the printed circuit board, covering the through holes. First lands to which the integrated circuit is connected are formed on a front side of the printed circuit board. Second lands to which the flexible substrate is connected are formed on the back side of the printed circuit board. The first lands and the second lands are connected to first ends and second ends of the through holes, respectively. Third lands are formed on a front side of the flexible substrate so as to face the second lands of the printed circuit board. Fourth lands are formed on a back side of the flexible substrate. The fourth lands are electrically connected to the third lands.
    Type: Application
    Filed: June 23, 2010
    Publication date: January 13, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Rie Takada, Kenichiro Tsubone
  • Publication number: 20100214741
    Abstract: An electronic component mounting structure includes a first substrate on which a first component is mounted and a second substrate connected to the first substrate. The second substrate is bent toward the first component.
    Type: Application
    Filed: December 7, 2009
    Publication date: August 26, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Rie Takada, Kenichiro Tsubone
  • Patent number: 7360439
    Abstract: In a circuit, as the bridge resistance of one side of a Wheatstone bridge circuit, a distortion gauge (fixed reference resistance) of which variation caused by environmental conditions is suppressed and a sample having a resistance component ?R varied by the environmental conditions are connected in series. A constant bridge input voltage Ei is applied from a constant-voltage power supply to the Wheatstone bridge circuit, a bridge output voltage Eo corresponding to resistance variation of the sample is input to a dynamic distortion amplifier, and a carrier wave signal of a predetermined frequency is output. A measured resistance computing unit samples peak levels of the carrier wave signal output from the dynamic distortion amplifier so as to detect the bridge output voltage Eo, and calculates the resistance of the sample based on the detected bridge output voltage.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: April 22, 2008
    Assignee: Fujitsu Limited
    Inventors: Yasuhide Kuroda, Kenichiro Tsubone
  • Publication number: 20070199386
    Abstract: In a circuit, as the bridge resistance of one side of a Wheatstone bridge circuit, a distortion gauge (fixed reference resistance) of which variation caused by environmental conditions is suppressed and a sample having a resistance component ?R varied by the environmental conditions are connected in series. A constant bridge input voltage Ei is applied from a constant-voltage power supply to the Wheatstone bridge circuit, a bridge output voltage Eo corresponding to resistance variation of the sample is input to a dynamic distortion amplifier, and a carrier wave signal of a predetermined frequency is output. A measured resistance computing unit samples peak levels of the carrier wave signal output from the dynamic distortion amplifier so as to detect the bridge output voltage Eo, and calculates the resistance of the sample based on the detected bridge output voltage.
    Type: Application
    Filed: August 1, 2006
    Publication date: August 30, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Yasuhide Kuroda, Kenichiro Tsubone
  • Patent number: 7177548
    Abstract: An optical module which can achieve miniaturization, high performance and cost reduction is, provided. The optical module includes a photoelectric component, a high-speed signal processing part which processes a high-speed signal photoelectrically converted by the photoelectric component, and a low-speed signal processing part which processes a low-speed signal. The high-speed signal processing part and the low-speed signal processing part are overlapped with each other in a vertical direction and electrically connected to each other.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: February 13, 2007
    Assignee: Fujitsu Limited
    Inventors: Yasuhide Kuroda, Masakazu Kishi, Yoshinori Nakane, Satoru Yamada, Kenichiro Tsubone, Yuji Miyaki, Shigeichi Izumi, Kazuhiro Suzuki
  • Publication number: 20060231541
    Abstract: A heater that attaches an electronic component having a ball grid array structure to and detaches the electronic component from a substrate on which the electronic component operates includes a body fixed onto the electronic component, and a heating element, provided on the body, which heats and melts soldering balls having the ball grid array structure when receiving power supply.
    Type: Application
    Filed: July 29, 2005
    Publication date: October 19, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Rie Takada, Kenichiro Tsubone
  • Publication number: 20050074243
    Abstract: An optical module which can achieve miniaturization, high performance and cost reduction is, provided. The optical module includes a photoelectric component, a high-speed signal processing part which processes a high-speed signal photoelectrically converted by the photoelectric component, and a low-speed signal processing part which processes a low-speed signal. The high-speed signal processing part and the low-speed signal processing part are overlapped with each other in a vertical direction and electrically connected to each other.
    Type: Application
    Filed: November 4, 2004
    Publication date: April 7, 2005
    Applicant: FUJITSI LIMITED
    Inventors: Yasuhide Kuroda, Masakazu Kishi, Yoshinori Nakane, Satoru Yamada, Kenichiro Tsubone, Yuji Miyaki, Shigeichi Izumi, Kazuhiro Suzuki
  • Patent number: 6832049
    Abstract: An optical module which can achieve miniaturization, high performance and cost reduction is provided. The optical module includes a photoelectric component, a high-speed signal processing part which processes a high-speed signal photoelectrically converted by the photoelectric component, and a low-speed signal processing part which processes a low-speed signal. The high-speed signal processing part and the low-speed signal processing part are overlapped with each other in a vertical direction and electrically connected to each other.
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: December 14, 2004
    Assignee: Fujitsu Limited
    Inventors: Yasuhide Kuroda, Masakazu Kishi, Yoshinori Nakane, Satoru Yamada, Kenichiro Tsubone, Yuji Miyaki, Shigeichi Izumi, Kazuhiro Suzuki
  • Patent number: 5910755
    Abstract: A laminate capacitor circuit board which permits constants of various kinds of circuit elements to be set by selectively effected connections between wiring layers, and a laminate capacitor circuit board which permits distributed circuit constants in a high-frequency wiring layer sandwiched between two shielding wiring layers to be set as desired. These circuits are formed with at least a pattern of a conductive foil on each dielectric layer, and include a plurality of wiring layers laminated one upon another, a wiring layer for connections laminated to a surface of the plurality of wiring layers laminated one upon another, a plurality of terminal patterns formed on the wiring layer for connections in a state insulated from each other, a plurality of vias for electrically connecting at least two of the plurality of terminal patterns to corresponding ones of the plurality of wiring layers, and connecting means for selectively connecting the plurality of terminal patterns to each other.
    Type: Grant
    Filed: October 28, 1997
    Date of Patent: June 8, 1999
    Assignee: Fujitsu Limited
    Inventors: Hidehiro Mishiro, Kenichiro Tsubone, Mitsunori Abe, Rie Takada