Abstract: A semiconductor device includes a semiconductor substrate and an electrode disposed on a major surface of the semiconductor substrate. A via hole is formed on a center of the electrode so as to open from a surface of the electrode to a place under the surface of the semiconductor substrate. A via-hole foundation electrode for inhibiting diffusion from a metal layer is formed inside the via hole and on the surface of the electrode, a via-hole electrode is formed on the surface of the via-hole foundation electrode. A back via hole is formed on the back of the semiconductor substrate opposite to the major surface thereof, and opened from the back of the semiconductor substrate to the via-hole electrode. A back via-hole electrode is formed on the back of the semiconductor substrate including the inside of the back via hole.

Abstract: A semiconductor device includes a semiconductor substrate and an electrode disposed on a major surface of the semiconductor substrate. A via hole is formed on a center of the electrode so as to open from a surface of the electrode to a place under the surface of the semiconductor substrate. A via-hole foundation electrode for inhibiting diffusion from a metal layer is formed inside the via hole and on the surface of the electrode, a via-hole electrode is formed on the surface of the via-hole foundation electrode. Aback via hole is formed on the back of the semiconductor substrate opposite to the major surface thereof, and opened from the back of the semiconductor substrate to the via-hole electrode. A back via-hole electrode is formed on the back of the semiconductor substrate including the inside of the back via hole.

Abstract: A semiconductor device includes a semiconductor substrate, a metal layer formed on a surface of the semiconductor substrate, an electrode formed such that the electrode covers the metal layer, edges of the electrode being in ohmic contact with the semiconductor substrate, a via hole formed right under the metal layer, the via hole having a depth reaching the metal layer from a reverse side of the semiconductor substrate, and a ground electrode formed on an inside surface of the via hole and the reverse side of the semiconductor substrate, the ground electrode being connected to the electrode through the metal layer.

Abstract: A method of fabricating a field effect transistor with a spike-gate structure including forming a semiconductor layer on a semi-insulating substrate, and forming a recess having a spike shape in which a portion of a gate electrode projects into the semiconductor layer, in the semiconductor layer. The formation of the recess includes forming a narrow damaged layer in the semiconductor layer by one of focused ion beamion implantation and ion implantation; and wet-etching the semiconductor layer utilizing accelerated etching of the damaged layer, thereby forming a recess having a spike groove. As described above, without performing the complicated processes as in the prior art fabricating method shown in FIGS. 12(a)-12(i), by performing one FIB implantation process, an FET with a spike-gate structure can be fabricated by using simpler and fewer processes.

Abstract: A method of producing a semiconductor device includes preparing a semiconductor ingot having a (100) surface orientation and an orientation flat in a ?011! direction; cutting the semiconductor ingot in a plane which is obtained by tilting the (100) surface by an angle .theta. about an axis of the tilting, obtained by rotating the ?011! direction by an angle .phi. with the center of the (100) surface as an axis of the rotation, thereby producing a semiconductor wafer having a surface; producing a channel region in the semiconductor wafer; producing a refractory metal gate on the surface of the semiconductor wafer; and using the refractory metal gate as a mask, implanting dopant impurity ions into the semiconductor wafer in a direction perpendicular to the surface of the semiconductor wafer, thereby producing impurity-implanted regions in the semiconductor wafer. Channeling is prevented and the short-channel effect is suppressed.

Abstract: A method of producing on a substrate an in-plane-gate transistor includes producing a channel portion in which a quasi-one-dimensional conductive channel electrically connecting a source region and a drain region is generated and producing gate portions, each portion including a gate electrode layer for controlling generation and forfeiture of the quasi-one-dimensional conductive channel so that an upper surface of the gate layer and the quasi-one-dimensional conductive channel are positioned substantially in the same plane, on both sides of the channel portion on the substrate. Gaps between the channel portion and the gate portions are controlled by side walls produced self-aligningly on the side wall surfaces of the channel portion. Thus, gaps of a high aspect ratio can be produced between the channel portion and the gate portions without being limited by the dry etching technique.

Abstract: A microminiature vacuum tube and a process for fabrication thereof. The tube is formed on a compound semiconductor substrate using solid state semiconductor fabrication techniques. A straight line path for electron flow is provided by forming an emitter and collector in the same plane. The emitter and collector are formed in a low resistance layer of a compound semiconductor substrate, such as by etching a recess through the low resistance layer and into the substrate to define a separate emitter and collector. Preferential etching techniques are utilized to form a sharp-edge in at least the emitter portion of the recess. A gate is formed in the recess proximate to but out of the plane for electron flow. The use of microminiature solid state fabrication technique allows the recess to be formed at submicron size to reduce the voltage requirements on the microminiature vacuum tube.

Abstract: A microminiature vacuum tube and a process for fabrication thereof. The tube is formed on a compound semiconductor substrate using solid state semiconductor fabrication techniques. A straight line path for electron flow is provided by forming an emitter and collector in the same plane. The emitter and collector are formed in a low resistance layer of a compound semiconductor substrate, such as by etching a recess through the low resistance layer and into the substrate to define a separate emitter and collector. Preferential etching techniques are utilized to form a sharp-edge in at least the emitter portion of the recess. A gate is formed in the recess proximate to but out of the plane for electron flow. The use of microminiature solid state fabrication technique allows the recess to be formed at submicron size to reduce the voltage requirements on the microminiature vacuum tube.

Abstract: A field effect transistor for microwave and millimeter wave frequencies includes a plurality of feeding points on a gate finger extending on a substrate, an airbridge wiring structure which connects adjacent feeding points with each other, and a gate pad beyond the source and drain electrodes connected with the gate finger through the airbridge. The relatively wide gate connection reduces gate resistance. The gate connection does not cross the source and drain electrodes, reducing capacitance. The reduced resistance and capacitance significantly improve the high frequency noise figure.