Patents by Inventor Kenji Kishibe

Kenji Kishibe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6130481
    Abstract: A semiconductor integrated circuit structure includes a semiconductor substrate; an electronic element disposed in the substrate; a first electrically insulating layer disposed on the substrate and the electronic element; a first electrically conducting interconnection layer electrically connected to the electronic element and disposed at least partly on the first electrically insulating layer; a second electrically insulating layer disposed on the first electrically conducting interconnection layer; a second electrically conducting interconnection layer disposed on the second electrically insulating layer; and a through-hole penetrating the second electrically insulating layer to the first electrically conducting interconnection layer, part of the second interconnection layer being disposed within the through-hole and contacting the first electrically conducting interconnection layer wherein the first electrically conducting interconnection layer includes a current barrier including at least one opening in t
    Type: Grant
    Filed: October 28, 1997
    Date of Patent: October 10, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shigeru Harada, Kenji Kishibe, Akira Ihisa, Hiroshi Mochizuki, Eisuke Tanaka
  • Patent number: 5712509
    Abstract: A semiconductor integrated circuit structure includes a semiconductor substrate; an electronic element disposed in the substrate; a first electrically insulating layer disposed on the substrate and the electronic element; a first electrically conducting interconnection layer electrically connected to the electronic element and disposed at least partly on the first electrically insulating layer; a second electrically insulating layer disposed on the first electrically conducting interconnection layer; a second electrically conducting interconnection layer disposed on the second electrically insulating layer; and a through-hole penetrating the second electrically insulating layer to the first electrically conducting interconnection layer, part of the second interconnection layer being disposed within the through-hole and contacting the first electrically conducting interconnection layer wherein the first electrically conducting interconnection layer includes a current barrier including at least one opening in t
    Type: Grant
    Filed: April 24, 1992
    Date of Patent: January 27, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shigeru Harada, Kenji Kishibe, Akira Ohisa, Hiroshi Mochizuki, Eisuke Tanaka
  • Patent number: 4913090
    Abstract: A single chamber apparatus for chemical vapor deposition of films on semiconductor substrates transported through the chamber. Heaters and a plurality of gas dispersing heads are disposed in the chamber for forming films by chemical vapor deposition. A cooling head is disposed between each adjacent pair of gas dispersing heads for cooling whereby the surface temperature of the substrates opposite the gas dispersing heads is substantially equal to that of the substrates located opposite the cooling heads.
    Type: Grant
    Filed: September 20, 1988
    Date of Patent: April 3, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shigeru Harada, Masanori Obata, Eisuke Tanaka, Kenji Kishibe