Abstract: For example, the switching drive device 100 includes a driver 30 configured to drive an N-type semiconductor switch element, a current limiter 50 configured to limit a current fed to a boot capacitor BC1 included in a bootstrap circuit BTC, and a current controller 60 configured to control the operation of the current limiter 50. The current controller 60 is configured to drive the current limiter 50 to limit the current fed to the boot capacitor BC1 when the charge voltage across the boot capacitor BC1 is higher than a threshold value.

Abstract: This invention provides a hetero-junction bipolar transistor (HBT) in which both a base resistance and a base-collector parasitic capacitance are decreased. The HBT has a collector (C) 18, a base (B) 20 and an emitter (E) 26. The collector comprises an outer collector region and an inner collector region, a thickness of the outer collector region is greater than that of the inner region. The base comprises an intrinsic region and an extrinsic region on the outer collector region, while the intrinsic base disposed on the inner collector region. The emitter is disposed on both the intrinsic base and the extrinsic base, and has a band gap energy greater than that of the base.

Abstract: A method of making a heterojunction bipolar transistor comprises the steps of: forming a mask layer on a compound semiconductor film by using a photomask for forming an emitter; and forming the emitter by wet-etching the compound semiconductor film by using the mask layer. The photomask has a pattern thereon for forming the emitter. The pattern is defined by a first area R associated with the shape of the emitter to be formed, and a plurality of second areas T1 to T4. Each of the second areas T1 to T4 includes first and second sides S1 and S2 meeting each other to form an acute angle therebetween, and a third side S3 in contact with the first area R. In each of the second areas T1 to T4, one side S3 of the two sides meeting each other to form a right angle therebetween is in contact with one side of the area R, whereas the other side S1 is connected to another side of the first area R to form a line segment.

Abstract: This invention provides a hetero-junction bipolar transistor (HBT) in which both a base resistance and a base-collector parasitic capacitance are decreased. The HBT has a collector (C) 18, a base (B) 20 and an emitter (E) 26. The collector comprises an outer collector region and an inner collector region, a thickness of the outer collector region is greater than that of the inner region. The base comprises an intrinsic region and an extrinsic region on the outer collector region, while the intrinsic base disposed on the inner collector region. The emitter is disposed on both the intrinsic base and the extrinsic base, and has a band gap energy greater than that of the base.

Abstract: This invention provides a new configuration and manufacturing method of the hetero-junction bipolar transistor. According to the invention, the HBT comprises a semi-insulating InP substrate, a buffer layer on the substrate, a sub-collector layer, a collector layer, a base layer, an emitter layer, and an emitter contact layer These layers are sequentially grown on the buffer layer. Since a pre-processing of forming two depressions in the sub-collector layer before growing the collector layer, the top surface of the emitter layer becomes planar surface. This results on the reduction of pits induced in the etching of the emitter contact layer, thus enhances the reliability and the high frequency performance of the HBT.

Abstract: An input circuit that detects an abnormality of a voltage generation of the input circuit. The circuit includes an external output terminal, an analog voltage generator. The generator includes a power supply terminal, a grounding terminal, and an internal output terminal. The circuit includes a first resistor, which is connected to the power supply and to the power supply terminal, a second resistor, which is connected to the ground and to the grounding terminal, a third resistor, which is connected to the internal output terminal and to the external output terminal, and a fourth resistor, which is connected to the node of the third resistor and the external output terminal and to the ground. When the grounding terminal or the power supply terminal is open, the analog voltage of the external output terminal is in an upper limit fail voltage range or in a lower limit fail voltage range.

Abstract: This invention provides a new configuration and manufacturing method of the hetero-junction bipolar transistor. According to the invention, the HBT comprises a semi-insulating InP substrate, a buffer layer on the substrate, a sub-collector layer, a collector layer, a base layer, an emitter layer, and an emitter contact layer These layers are sequentially grown on the buffer layer. Since a pre-processing of forming two depressions in the sub-collector layer before growing the collector layer, the top surface of the emitter layer becomes planar surface. This results on the reduction of pits induced in the etching of the emitter contact layer, thus enhances the reliability and the high frequency performance of the HBT.

Abstract: The present invention relates to a hetero-bipolar transistor. This transistor comprises a semi-insulating InP substrate, a buffer layer on the substrate, a sub-collector layer on the buffer layer, a collector layer on the sub-collector layer, a base layer on the collector layer, a wide-gap emitter layer on the base layer and a emitter contact layer on the emitter layer. The emitter layer extends the emitter contact layer, so the edge of the emitter layer is apart from the emitter contact layer and entirely covers the region where the collector layer and the sub-collector layer are overlapped to each other. According to this configuration, the transistor shows the enhanced reliability and the improved high frequency performance.

Abstract: The present invention relates to a hetero-bipolar transistor. This transistor comprises a semi-insulating InP substrate, a buffer layer on the substrate, a sub-collector layer on the buffer layer, a collector layer on the sub-collector layer, a base layer on the collector layer, a wide-gap emitter layer on the base layer and a emitter contact layer on the emitter layer. The emitter layer extends the emitter contact layer, so the edge of the emitter layer is apart from the emitter contact layer and entirely covers the region where the collector layer and the sub-collector layer are overlapped to each other. According to this configuration, the transistor shows the enhanced reliability and the improved high frequency performance.

Abstract: An input circuit that detects an abnormality of a voltage generation of the input circuit. The circuit includes an external output terminal, an analog voltage generator. The generator includes a power supply terminal, a grounding terminal, and an internal output terminal. The circuit includes a first resistor, which is connected to the power supply and to the power supply terminal, a second resistor, which is connected to the ground and to the grounding terminal, a third resistor, which is connected to the internal output terminal and to the external output terminal, and a fourth resistor, which is connected to the node of the third resistor and the external output terminal and to the ground. When the grounding terminal or the power supply terminal is open, the analog voltage of the external output terminal is in an upper limit fail voltage range or in a lower limit fail voltage range.

Abstract: A method of making a heterojunction bipolar transistor comprises the steps of: forming a mask layer on a compound semiconductor film by using a photomask for forming an emitter; and forming the emitter by wet-etching the compound semiconductor film by using the mask layer. The photomask has a pattern thereon for forming the emitter. The pattern is defined by a first area R associated with the shape of the emitter to be formed, and a plurality of second areas T1 to T4. Each of the second areas T1 to T4 includes first and second sides S1 and S2 meeting each other to form an acute angle therebetween, and a third side S3 in contact with the first area R. In each of the second areas T1 to T4, one side S3 of the two sides meeting each other to form a right angle therebetween is in contact with one side of the area R, whereas the other side S1 is connected to another side of the first area R to form a line segment.

Abstract: A microwave amplifying circuit 1 has transistors 6, 8, and 10 and circuit sections 12, 14, 16, and 18. The circuit section 14 has one terminal electrically connected to a first current terminal of the transistor 6 and another terminal electrically connected to a control terminal of the transistor. The microwave amplifying circuit includes an impedance part 20a for supplying variable impedance between the terminals. The circuit section 16 has one terminal electrically connected to a first current terminal of the transistor 8 and another terminal electrically connected to a control terminal of the transistor 10. The circuit section 16 includes an impedance part 20b for providing variable impedance between the terminals.

Abstract: A connection structure for power supply to a vehicle door including a door side connector 4, a body side connector 3, a plurality of female terminals 9 provided in parallel in either one of the connectors, and a plurality of male terminals 46 corresponding to the female terminals provided in parallel in the other of the connectors, the female terminals 9 and the male terminals 46 being connected to each other when the door is closed, the female terminals 9 being arranged close to one another and synchronously swingable around a support shaft 15 in a direction of axial displacement with respect to the male terminals 46. The connection structure further includes a spring member 16 for forcing a pair of contact portions 20 of each of the female terminals 9 into a closed state, the spring member 16 including a pair of leg portions 16b1, 16b2 which are in abutment against spring receiving walls 36 of a housing 8 of either one of the connectors.

Abstract: To facilitate the mounting of a grommet in a hole formed in a body panel of a vehicle only by inserting it in one direction with a small force. There is provided a turnup portion 5d folded back from the outer radial end of a large diameter tubular portion 5c toward a small diameter tubular portion 5a. A locking groove 5e having a U-shaped cross is formed in the outer surface of the turnup portion 5d. At the leading end of the turnup portion 5d extending toward the small diameter tubular portion 5a, a locking portion 5g projects radially inwardly. A locking stepped portion 5h projects from the outer surface of the large diameter tubular portion 5c in a position corresponding to the locking groove 5e.