Abstract: A plug electrode is subject to etch back to remain in a contact hole and expose a barrier metal on a top surface of an interlayer insulating film. The barrier metal is subject to etch back, exposing the top surface of the interlayer insulating film. Remaining element structures are formed. After lifetime is controlled by irradiation of helium or an electron beam, hydrogen annealing is performed. During the hydrogen annealing, the barrier metal is not present on the interlayer insulating film covering a gate electrode, enabling hydrogen atoms to reach a mesa part, whereby lattice defects generated in the mesa part by the irradiation of helium or an electron beam are recovered, recovering the gate threshold voltage. Thus, predetermined characteristics of a semiconductor device having a structure where a plug electrode is provided in a contact hole, via barrier metal are easily and stably obtained when lifetime control is performed.

Abstract: A semiconductor device has a semiconductor substrate including a first conductivity-type drift layer, a second conductivity-type base layer disposed in a surface layer portion of the drift layer, and a second conductivity-type collector layer and a first conductivity-type cathode layer disposed opposite to the base layer with respect to the drift layer. In the semiconductor substrate, an IGBT region and a diode region are alternately and repetitively arranged. The IGBT region and the diode region are divided by a boundary between the collector layer and the cathode layer. The collector layer is defined as a first collector layer. The semiconductor device includes a second collector layer having a second conductivity-type impurity concentration higher than that of the first collector layer, at a surface of the semiconductor substrate adjacent to the first collector layer and the cathode layer.

Abstract: The present disclosure provides a semiconductor chip. The semiconductor chip includes a switching element having a gate electrode, a first pad, and a second pad. The first control pad is electrically connected to the gate electrode and applied with a voltage controlling the switching element to switch on or switch off. The second control pad provides a current path of a control current flowing between the first control pad and the second control pad when the switching element is in a switch-on state. One of the first control pad or the second control pad includes two pad components and a remaining one of the first control pad or the second control pad is disposed between the two pad components of the one of the first control pad or the second control pad.

Abstract: A semiconductor device includes a semiconductor substrate having a drift layer, a base layer, a collector layer and a cathode layer. The semiconductor substrate includes a cell region and an outer peripheral region surrounding the cell region. The cell region includes an IGBT region and a diode region. The semiconductor substrate further includes a damage region arranged in the diode region and a part of the outer peripheral region adjacent to a boundary between the outer peripheral region and the diode region. A length, in a longitudinal direction of the diode region, of the part of the outer peripheral region, in which the damage region is arranged, is equal to or more than twice of a thickness of the semiconductor substrate. As a result, recovery characteristic is improved in a portion of the diode region adjacent to the boundary between the outer peripheral region and the diode region.

Abstract: A semiconductor device includes a semiconductor substrate with: a drift layer; a base layer; and a collector layer and a cathode layer. In the semiconductor substrate, when a region operating as an IGBT device is an IGBT region and a region operating as a diode device is a diode region, the IGBT and diode regions are arranged alternately in a repetitive manner; a damaged region is arranged on a surface portion of the diode region in the semiconductor substrate. The IGBT and diode regions are demarcated by a boundary between the collector and cathode layers; and a surface portion of the IGBT region includes: a portion having the damaged region at a boundary side with the diode region; and another portion without the damaged region arranged closer to an inner periphery side relative to the boundary side.

Abstract: A semiconductor device has a semiconductor substrate including a first conductivity-type drift layer, a second conductivity-type base layer disposed in a surface layer portion of the drift layer, and a second conductivity-type collector layer and a first conductivity-type cathode layer disposed opposite to the base layer with respect to the drift layer. In the semiconductor substrate, an IGBT region and a diode region are alternately and repetitively arranged. The IGBT region and the diode region are divided by a boundary between the collector layer and the cathode layer. The collector layer is defined as a first collector layer. The semiconductor device includes a second collector layer having a second conductivity-type impurity concentration higher than that of the first collector layer, at a surface of the semiconductor substrate adjacent to the first collector layer and the cathode layer.

Abstract: A semiconductor device includes a semiconductor substrate provided with an IGBT cell having a collector region and a diode cell having a cathode region, a first defect layer and a second defect layer in a drift region. A region present in the drift region and surrounded by an interface between the IGBT cell and the diode cell orthogonal to a first principal plane, and a plane passing through a boundary between the collector region and the cathode region on a boundary line along an interface between the collector region and the drift region and crossing the first principal plane at an angle of 45 degrees is referred to as a boundary region. The diode cell satisfies a relationship of SD1>S, in which S is an area occupied by the boundary region and SD1 is an area occupied by the diode cell in a surface of the drift region.

Abstract: On a front surface side of an n? semiconductor substrate, an emitter electrode and trench gates each including a p base layer, a trench, a gate oxide film and a gate electrode are provided in an IGBT region and a FWD region. Among p base layers each between adjacent trenches, p base layers having an n+ emitter region are the IGBT emitter region and the p base layers not having the n+ emitter region are the FWD anode region. A lateral width of an n+ cathode region is narrower than a lateral width of the FWD anode region. A difference of a lateral width of the FWD anode region and a lateral width of the n+ cathode region is 50 ?m or more. Thus, a semiconductor device may be provided that reduces the forward voltage drop while suppressing waveform oscillation during reverse recovery and having soft recover characteristics.

Abstract: A method of manufacturing a semiconductor device having an insulated gate bipolar transistor portion and a freewheeling diode portion. The method includes introducing an impurity to a rear surface of a semiconductor substrate, performing first heat treating to activate the impurity to form a field stop layer, performing a first irradiation to irradiate light ions from the rear surface of semiconductor substrate to form, in the semiconductor substrate, a first low-lifetime region, performing a second irradiation to irradiate the light ions from the rear surface of the semiconductor substrate to form, in the field stop layer, a second low-lifetime region, and performing second heat treating to reduce a density of defects generated in the field stop layer when the second irradiation is performed. Each of the first and second low-lifetime regions has a carrier lifetime thereof shorter than that of any region of the semiconductor device other than the first and second low-lifetime regions.

Abstract: A vibration device includes a touch panel, a vibrator that is arranged on the touch panel, a frame that is separated from at least a part of the touch panel and is arranged to surround the touch panel in a planar view, and a first connecting member that is arranged on the touch panel and the frame to cover a space between a part of the touch panel and the frame in a planar view and that connects the touch panel and the frame. Furthermore the first connecting member includes a first member positioned on the operation panel, a second member positioned on the frame, and a third member covering a space in a planar view. The thickness of the third member is smaller than those of the first and second members.

Abstract: A charge potential distributed over a vehicle body resulting from the contact, separation, and friction between a tire and a road surface is detected by a detecting unit provided with a sensing electrode that is disposed on the external surface of the vehicle body, a reference electrode that is disposed apart from the external surface of the vehicle body with a space therebetween, and a sensor amplifier that senses a potential between the sensing electrode and the reference electrode as a signal and amplifies the signal. And the amplitude of the charge potential detected by the detecting unit is monitored by a data processing unit, thereby making it possible to accurately identify not only the state of the road surface but also an internal pressure state of the tire, a wear state of the tire, and the like during vehicular travel.

Abstract: A semiconductor device that includes a plurality of trench gate structures each having a gate electrode extending in a depth direction of an element, the plurality of trench gate structures including first trench gate structures respectively contributing to control of the element and second trench gate structures respectively not contributing to the control of the element, the semiconductor device including an electrode portion having a potential other than a gate potential, and an electrode pad that is disposed on a front face of a semiconductor substrate, wherein the electrode pad is used as a terminal to apply a predetermined voltage to gate insulator films, in screening that is executed by applying the predetermined voltage to the gate insulator films respectively in contact with the gate electrode connected to the electrode pad and that is executed before the electrode pad is short-circuited to the electrode portion.

Abstract: A semiconductor device includes: a diode-integrated IGBT element in a same semiconductor substrate having a diode element and an IGBT element driven by a drive signal towards a gate; a sense element having a diode sense element with a current proportional to a current through the diode element and an IGBT sense element with a current proportional to a current through the IGBT element; a switch element connected to a first current pathway through the diode sense element and to a second current pathway different from the first current pathway. The switch element is turned off to control the second current pathway to be discontinuous with the first current pathway when no current flows through the diode sense element, and is turned on to control the second current pathway to be continuous with the first current pathway and apply a current when a current flows through the diode sense element.

Abstract: A semiconductor device includes a semiconductor substrate having a drift layer, a base layer, a collector layer and a cathode layer. The semiconductor substrate includes a cell region and an outer peripheral region surrounding the cell region. The cell region includes an IGBT region and a diode region. The semiconductor substrate further includes a damage region arranged in the diode region and a part of the outer peripheral region adjacent to a boundary between the outer peripheral region and the diode region. A length, in a longitudinal direction of the diode region, of the part of the outer peripheral region, in which the damage region is arranged, is equal to or more than twice of a thickness of the semiconductor substrate. As a result, recovery characteristic is improved in a portion of the diode region adjacent to the boundary between the outer peripheral region and the diode region.

Abstract: A semiconductor device includes a semiconductor substrate with: a drift layer; a base layer; and a collector layer and a cathode layer. In the semiconductor substrate, when a region operating as an IGBT device is an IGBT region and a region operating as a diode device is a diode region, the IGBT and diode regions are arranged alternately in a repetitive manner; a damaged region is arranged on a surface portion of the diode region in the semiconductor substrate. The IGBT and diode regions are demarcated by a boundary between the collector and cathode layers; and a surface portion of the IGBT region includes: a portion having the damaged region at a boundary side with the diode region; and another portion without the damaged region arranged closer to an inner periphery side relative to the boundary side.

Abstract: A semiconductor device includes: a semiconductor chip having a switching element and multiple pads electrically connected to the switching element; and multiple lead terminals electrically connected to the respective pads. The multiple lead terminals include a control terminal used for control of on/off operation of the switching element, and a main terminal into which a main current flows when the switching element is in an on state. A coupling coefficient k falls within a range of ?3%?k?2%, where the coupling coefficient k is defined by a parasitic inductance Lg in a current path of a control current flowing in the control terminal, a parasitic inductance Lo in a current path of the main current, and a mutual inductance Ms of the parasitic inductances Lg and Lo.

Abstract: An electric storage device includes an electrode assembly, a case that includes a defining wall and houses the electrode assembly, a sealing member that is arranged on the defining wall, and a conductive member that is electrically connected to the electrode assembly, the conductive member being supported by the sealing member. At least a portion of the defining wall where the sealing member is arranged includes an aluminum-based metallic material. The sealing member includes a material that is softer than the material for the at least a portion of the defining wall where the sealing member is arranged. The sealing member includes polyphenylene sulfide (PPS) resin and an elastomer. The elastomer is contained in an amount of 2% to 20% by weight. The conductive member is crimped in such a manner that the sealing member is pressed against the defining wall.

Abstract: A semiconductor device that includes a plurality of trench gate structures each having a gate electrode extending in a depth direction of an element, the plurality of trench gate structures including first trench gate structures respectively contributing to control of the element and second trench gate structures respectively not contributing to the control of the element, the semiconductor device including an electrode portion having a potential other than a gate potential, and an electrode pad that is disposed on a front face of a semiconductor substrate, wherein the electrode pad is used as a terminal to apply a predetermined voltage to gate insulator films, in screening that is executed by applying the predetermined voltage to the gate insulator films respectively in contact with the gate electrode connected to the electrode pad and that is executed before the electrode pad is short-circuited to the electrode portion.

Abstract: A fabrication method of a semiconductor device that includes trench gate structures each having a gate electrode extending in a depth-direction of an element, where first trench gate structures contribute to controlling the element and second trench gate structures do not contribute. The fabrication method includes forming the trench gate structures on a front face of a semiconductor substrate; forming on the front face, an electrode pad connected to the gate electrode of at least one trench gate structure; executing screening by applying a predetermined voltage between the electrode pad and an electrode portion having a potential other than a gate potential, to apply the predetermined voltage to gate insulator films in contact with each gate electrode connected to the electrode pad; and forming the second trench gate structures having the gate electrodes connected to the electrode pad, by short-circuiting the electrode portion to the electrode pad after executing screening.

Abstract: The production method for a polyolefin-based structure of the present invention produces a polyolefin-based structure from a mixed source material containing a polyolefin (A), an acid-modified polyolefin (B) and a gas barrier resin (C) using a molding machine 10, under the condition mentioned below. The molding machine 10 is equipped with a single-screw extruder 11, a die head 12, and an adaptor 13 for feeding the mixed source material from the single-screw extruder 11 to the die head 12. Am+10° C.?T1?Cm?10° C. (1), Cm?30° C.?T2?Cm+30° C. (2), Cm?10° C.?T3?Cm+50° C. (3), Cm?30° C.?T4?Cm+30° C. (4). T1 is a cylinder temperature in a section corresponding to a supply zone 21A and a compression zone 21B, T2 is a cylinder temperature in a section corresponding to a metering zone 21C, T3 is a temperature of an adaptor 13, T4 is a temperature of a die head, Am is the melting point of the component (A), and Cm is the melting point of the component (C).