Patents by Inventor Kenji Mukai

Kenji Mukai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145765
    Abstract: A non-aqueous electrolyte power storage device in which a coating material having a silanol group is present at least on a surface of an electrode active material layer and a sulfur-based material is contained in a cell, the electrode active material layer contains an electrode active material and a resin-based binder, the electrode active material is an active material capable of being alloyed with a metal element identical to an ion species responsible for electrical conduction or an active material capable of absorbing ions responsible for electrical conduction, and the coating material having a silanol group is a silicate containing a siloxane bond as a component or a silica fine particle aggregate (containing a siloxane bond as a component).
    Type: Application
    Filed: October 14, 2020
    Publication date: May 2, 2024
    Applicants: ATTACCATO Limited Liability Company, ADEKA Corporation
    Inventors: Takashi Mukai, Naoto Yamashita, Yuta Ikeuchi, Taichi Sakamoto, Kenji Kakiage, Tomofumi Yokomizo, Yohei Aoyama
  • Patent number: 11966181
    Abstract: A tubular fuser device rotates and is in contact with a sheet on which a positively charged toner image is formed to fix the toner image to the sheet. The fuser device includes a tubular substrate made of a metal, a rubber layer covering the outer periphery of the substrate, an adhesion layer covering the outer periphery of the rubber layer, and a surface layer made of a resin covering the outer periphery of the adhesion layer. The adhesion layer has a first adhesion layer that is in contact with the rubber layer and a second adhesion layer interposed between the first adhesion layer and the surface layer. The first adhesion layer is made of a fluororesin-based adhesive, and the second adhesion layer is made of a silicone rubber-based adhesive containing an ionic conductor.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: April 23, 2024
    Assignee: NOK CORPORATION
    Inventors: Wataru Nemoto, Kenji Sasaki, Masaya Suzuki, Hidetomo Mukai
  • Publication number: 20240118919
    Abstract: Some embodiments provide a novel method for deploying containerized applications. The method of some embodiments deploys a data collecting agent on a machine that operates on a host computer and executes a set of one or more workload applications. From this agent, the method receives data regarding consumption of a set of resources allocated to the machine by the set of workload applications. The method assesses excess capacity of the set of resources for use to execute a set of one or more containers, and then deploys the set of one or more containers on the machine to execute one or more containerized applications. In some embodiments, the set of workload applications are legacy workloads deployed on the machine before the installation of the data collecting agent. By deploying one or more containers on the machine, the method of some embodiments maximizes the usages of the machine, which was previously deployed to execute legacy non-containerized workloads.
    Type: Application
    Filed: September 27, 2023
    Publication date: April 11, 2024
    Inventors: Rohit Seth, Kenji Kaneda, Somik Behera, Guangrui Fu, Ruyang Lin, Jun Mukai
  • Publication number: 20240118989
    Abstract: Some embodiments provide a novel method for deploying containerized applications. The method of some embodiments deploys a data collecting agent on a machine that operates on a host computer and executes a set of one or more workload applications. From this agent, the method receives data regarding consumption of a set of resources allocated to the machine by the set of workload applications. The method assesses excess capacity of the set of resources for use to execute a set of one or more containers, and then deploys the set of one or more containers on the machine to execute one or more containerized applications. In some embodiments, the set of workload applications are legacy workloads deployed on the machine before the installation of the data collecting agent. By deploying one or more containers on the machine, the method of some embodiments maximizes the usages of the machine, which was previously deployed to execute legacy non-containerized workloads.
    Type: Application
    Filed: September 27, 2023
    Publication date: April 11, 2024
    Inventors: Rohit Seth, Kenji Kaneda, Somik Behera, Guangrui Fu, Ruyang Lin, Jun Mukai
  • Patent number: 11955637
    Abstract: To provide an electrode for non-aqueous electrolyte batteries, which traps hydrogen sulfide gas, generated from the inside thereof for some reason, in the electrode, and suppresses the outflow of hydrogen sulfide gas to the outside of the battery. An electrode for lithium ion batteries includes a coating material which contains a silanol group and is present on at least a surface of an active material layer. The active material layer contains a sulfur-based material and a resin-based binder. The sulfur-based material is an active material capable of alloying with lithium metal or an active material capable of occluding lithium ions. The coating material containing the silanol group is a silicate having a siloxane bond or a silica fine particle aggregate having a siloxane bond as a component.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: April 9, 2024
    Assignees: ATTACCATO LIMITED LIABILITY COMPANY, ADEKA CORPORATION
    Inventors: Takashi Mukai, Naoto Yamashita, Yuta Ikeuchi, Taichi Sakamoto, Kenji Kakiage, Hiroyuki Osada, Yohei Aoyama
  • Publication number: 20230134242
    Abstract: A differential amplifying apparatus includes an input matching circuit serving as an input balun to which a signal inputted to an input terminal is input, an output matching circuit serving as an output balun that outputs a signal to an output terminal, first and second amplifiers provided in parallel between the input balun and the output balun and configured to output a differential signal, a diode provided between a reference potential and a path between the input balun and the first amplifier, a second diode provided between a reference potential and a path between the input balun and the second amplifier, and a bias circuit that applies a bias to the first diode and the second diode, in which a cathode of the first diode and a cathode of the second diode are connected to the reference potential side.
    Type: Application
    Filed: November 1, 2022
    Publication date: May 4, 2023
    Inventors: Masafumi KAZUNO, Kenji MUKAI
  • Patent number: 11588442
    Abstract: A power amplifier circuit includes a first power supply terminal electrically connected to a first power amplifier; a second power supply terminal electrically connected to a second power amplifier subsequent to the first power amplifier; a first external power supply line configured to electrically connect a power supply circuit configured to output a power supply potential corresponding to an amplitude level of a high-frequency input signal and the first power supply terminal; and a second external power supply line configured to electrically connect the power supply circuit and the second power supply terminal. An inductance value of the first external power supply line is higher than an inductance value of the second external power supply line.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: February 21, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Satoshi Arayashiki, Kenji Mukai
  • Patent number: 11444585
    Abstract: A power amplifier includes power amplification circuits in a plurality of stages including a first stage and a second stage, each power amplification circuit including a transistor. The power amplification circuit in the first stage includes a first impedance circuit between an emitter of the transistor and a reference potential. The first impedance circuit has an impedance that does not vary with frequency or an impedance that varies with frequency. The power amplification circuit in the second stage includes a second impedance circuit between an emitter of the transistor and a reference potential. The second impedance circuit has an impedance that does not vary with frequency or an impedance that varies with frequency.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: September 13, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Fumio Harima, Kenji Mukai
  • Patent number: 11444582
    Abstract: A power amplifier circuit includes an amplifier transistor, a bias circuit that supplies a bias current or voltage to the amplifier transistor, and a resistance element connected between a base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied and an emitter connected to the emitter of the first transistor, a signal supply circuit that supplies an input signal to the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: September 13, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Kenji Mukai, Fumio Harima
  • Patent number: 11195807
    Abstract: Reduction in impedance in a lead connected to a semiconductor element is achieved while achieving anchor effect. The semiconductor device includes a heatsink, a semiconductor element, a lead disposed on an upper side of the heatsink, and a molding material formed to cover the lead, the heatsink, and the semiconductor element. Formed on an edge portion of a lower surface in a position, in the heatsink, overlapping with the lead in a plan view is a first convex portion protruding more than an edge portion of an upper surface in the position, and formed on an edge portion of an upper surface in a position, in the heatsink, which does not overlap with the lead in a plan view is a second convex portion protruding more than an edge portion of a lower surface in the position.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: December 7, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Tomoyuki Asada, Yoichi Nogami, Kenichi Horiguchi, Shigeo Yamabe, Satoshi Miho, Kenji Mukai
  • Publication number: 20210152132
    Abstract: A power amplifier circuit includes an amplifier transistor, a bias circuit that supplies a bias current or voltage to the amplifier transistor, and a resistance element connected between a base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied and an emitter connected to the emitter of the first transistor, a signal supply circuit that supplies an input signal to the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Application
    Filed: January 27, 2021
    Publication date: May 20, 2021
    Inventors: Yuri HONDA, Kenji MUKAI, Fumio HARIMA
  • Publication number: 20210135630
    Abstract: A power amplifier circuit includes a first power supply terminal electrically connected to a first power amplifier; a second power supply terminal electrically connected to a second power amplifier subsequent to the first power amplifier; a first external power supply line configured to electrically connect a power supply circuit configured to output a power supply potential corresponding to an amplitude level of a high-frequency input signal and the first power supply terminal; and a second external power supply line configured to electrically connect the power supply circuit and the second power supply terminal. An inductance value of the first external power supply line is higher than an inductance value of the second external power supply line.
    Type: Application
    Filed: October 30, 2020
    Publication date: May 6, 2021
    Inventors: Satoshi TANAKA, Satoshi ARAYASHIKI, Kenji MUKAI
  • Patent number: 10924067
    Abstract: A power amplifier circuit includes an amplifier transistor, a bias circuit that supplies a bias current or voltage to the amplifier transistor, and a resistance element connected between a base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied and an emitter connected to the emitter of the first transistor, a signal supply circuit that supplies an input signal to the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: February 16, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Kenji Mukai, Fumio Harima
  • Publication number: 20200227363
    Abstract: Reduction in impedance in a lead connected to a semiconductor element is achieved while achieving anchor effect. The semiconductor device includes a heatsink, a semiconductor element, a lead disposed on an upper side of the heatsink, and a molding material formed to cover the lead, the heatsink, and the semiconductor element. Formed on an edge portion of a lower surface in a position, in the heatsink, overlapping with the lead in a plan view is a first convex portion protruding more than an edge portion of an upper surface in the position, and formed on an edge portion of an upper surface in a position, in the heatsink, which does not overlap with the lead in a plan view is a second convex portion protruding more than an edge portion of a lower surface in the position.
    Type: Application
    Filed: September 28, 2017
    Publication date: July 16, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tomoyuki ASADA, Yoichi NOGAMI, Kenichi HORIGUCHI, Shigeo YAMABE, Satoshi MIHO, Kenji MUKAI
  • Patent number: 10715093
    Abstract: A power amplifier module includes a first transistor that amplifies and outputs a radio frequency signal, a second transistor smaller in size than the first transistor and connected in parallel with the first transistor, a third transistor that supplies a bias current to the first and second transistors, a current detection circuit that detects a current flowing through a collector of the second transistor, and a bias control circuit that controls the bias current supplied from the third transistor to the first and second transistors by supplying a current corresponding to a detection result of the current detection circuit to a collector or a drain of the third transistor. In a case that a current flowing through the collector of the second transistor is larger than a predetermined threshold value, the bias control circuit reduces the current supplied to the collector or the drain of the third transistor.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: July 14, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Fuminori Morisawa, Kenji Mukai, Yuri Honda
  • Publication number: 20200052658
    Abstract: A power amplifier circuit includes an amplifier transistor, a bias circuit that supplies a bias current or voltage to the amplifier transistor, and a resistance element connected between a base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied and an emitter connected to the emitter of the first transistor, a signal supply circuit that supplies an input signal to the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Application
    Filed: July 24, 2019
    Publication date: February 13, 2020
    Inventors: Yuri HONDA, Kenji MUKAI, Fumio HARIMA
  • Publication number: 20190356281
    Abstract: A power amplifier includes power amplification circuits in a plurality of stages including a first stage and a second stage, each power amplification circuit including a transistor. The power amplification circuit in the first stage includes a first impedance circuit between an emitter of the transistor and a reference potential. The first impedance circuit has an impedance that does not vary with frequency or an impedance that varies with frequency. The power amplification circuit in the second stage includes a second impedance circuit between an emitter of the transistor and a reference potential. The second impedance circuit has an impedance that does not vary with frequency or an impedance that varies with frequency.
    Type: Application
    Filed: May 9, 2019
    Publication date: November 21, 2019
    Inventors: Yuri HONDA, Fumio HARIMA, Kenji MUKAI
  • Publication number: 20190280658
    Abstract: A power amplifier module includes a first transistor that amplifies and outputs a radio frequency signal, a second transistor smaller in size than the first transistor and connected in parallel with the first transistor, a third transistor that supplies a bias current to the first and second transistors, a current detection circuit that detects a current flowing through a collector of the second transistor, and a bias control circuit that controls the bias current supplied from the third transistor to the first and second transistors by supplying a current corresponding to a detection result of the current detection circuit to a collector or a drain of the third transistor. In a case that a current flowing through the collector of the second transistor is larger than a predetermined threshold value, the bias control circuit reduces the current supplied to the collector or the drain of the third transistor.
    Type: Application
    Filed: February 25, 2019
    Publication date: September 12, 2019
    Inventors: Fuminori MORISAWA, Kenji MUKAI, Yuri HONDA
  • Patent number: 9407216
    Abstract: A comparator 13 that detects the difference between a high frequency signal detected by a detector 12 and a feedback signal A output from a comparator 11; a comparator 14 that detects the difference between the difference detected by the comparator 13 and a feedback signal B output from an adder 18; and a loop filter 15 that passes only a prescribed low frequency band of the output signal of the comparator 14 are provided, in which an amplitude sensitivity adjuster 16 adjusts the amplitude sensitivity of a variable gain amplifier 3 in accordance with the rate of change of the signal passing through the loop filter 15, thereby controlling the gain of the variable gain amplifier 3.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: August 2, 2016
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Tatsuo Kohama, Yutaro Yamaguchi, Naoko Nitta, Kenji Mukai, Hiroshi Otsuka, Kenichi Horiguchi, Morishige Hieda, Koji Yamanaka, Satoshi Miho
  • Publication number: 20150342696
    Abstract: An illumination apparatus includes a light emitting unit configured to emit illumination light including a first light having a first peak wavelength of a first peak in a first wavelength range of 495 nm to 510 nm and a second light having a second peak wavelength of a second peak in a second wavelength range of 610 nm to 680 nm. In the illumination apparatus, an intensity of the second light at the second peak wavelength is higher than an intensity of the first light at the first peak wavelength.
    Type: Application
    Filed: May 21, 2015
    Publication date: December 3, 2015
    Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Tohru HIMENO, Kenji MUKAI, Yoko MATSUBAYASHI, Naoko TAKEI