Abstract: A transition state detecting device of the invention is a device which is applied to the output stage of a detecting circuit such as a spectrum analyzer so as to display the waveform of an input signal in the form of a parameter and evaluate its characteristics. In order to perform real-time, quantitative measurement, the device includes a differentiating means (1) for differentiating an input signal and outputting a differential signal representing a transition state of the input signal, and a detecting means (2) for detecting the peak value of the differential signal output from the differentiating means and outputting a parameter corresponding to the transition state of the input signal.

Abstract: A digital signal processing apparatus includes an A/D converter for converting an analog input signal to digital data, a memory having a plurality of memory blocks for storing the digital data, and a processor for processing digital data when read out from the memory. A first controller cyclically stores output digital data from the A/D converter in the blocks in the memory in a predetermined order and outputs the stored data to the processor every time a first command is generated by a first command generator. A second controller inhibits updating of a specific block designated by a second command generator, and outputs the data from the specific block to the processor every time a second command is generated by the second command generator.

Abstract: A digital signal processing apparatus has: an A/D converter for A/D converting an input signal to be processed to a digital signal, an analog comparator for comparing the input signal with a predetermined threshold voltage and generating a comparison signal as a binary signal, a first input device for inputting at least binary data of a reference wave to be triggered, a discriminator for discriminating a coincidence between the binary signal from the analog comparator and the binary data entered at the first input device and generating a coincidence signal, a fetching section, triggered in response to the coincidence signal from the discriminator, for fetching the digital signal from the A/D converter, and a processor for performing predetermined processing of the digital signal fetched by the fetching device.

Abstract: Digital wave observation apparatus includes first and second A/D converters to convert input signals of first and second channels into corresponding first and second digital signals. First and second delay circuits selectively delay the first and second digital signals, and a wave memory stores signals output from the first and second delay circuits for purposes of display. A first command device receives channel designating data corresponding to the first channel and desired delay value setting data, and provides first delay data to a first delay value setting device coupled to the first delay circuit. A second command device receives designating data corresponding to the second channel and desired delay value setting data, and provides second delay data to the first delay value setting device and a second delay value setting device coupled to the second delay circuit.

Abstract: In a digital wave observation apparatus having an A/D converter for A/D converting an input signal, a trigger level setting device for setting a trigger level, a trigger signal generator for comparing the input signal with a set trigger level and generating a trigger signal, a wave memory for storing an A/D converted input signal in response to the trigger signal, and a display for displaying the input signal stored in the wave memory, the apparatus has a trigger level display device for displaying a horizontal line corresponding to a trigger level on the display irrespective of generation of the trigger signal.

Abstract: A phase detector is disclosed in which means are provided for sensing when two AC signals being subjected to phase difference measurement become close in phase, within a predetermined range, and for inverting one of these signals in phase when such a close phase relationship is sensed. The phase difference between the phase inverted signal and the other signal is then measured, and compensation is applied to the measured results such as to compensate for the effects of the phase inversion operation. Insensitivity and "hunting" effects which occur with prior art phase detectors in the region of zero phase difference are thereby eliminated, and an output signal can be obtained which varies in a smooth and continuous manner with variations in the phase difference between the two signals under measurement, over a 360.degree. range.

Abstract: In a multiprocessory system comprising a plurality of CPUs interconnected by a common bus, means are provided whereby the CPUs are periodically and cyclically enabled to access the bus. Data transfer from one CPU to another is performed by first storing the data into a main memory connected to the bus, then transferring the data from main memory to the destination CPU when the latter is enabled to utilize the bus and is in a condition to accept the data. Means can also be provided whereby, when data must be immediately transferred from one CPU to another, the sending CPU stores the data in main memory, generates signals whereby the destination CPU is given use of the bus, and generates an interrupt which causes transfer of the stored data into the destination CPU.