Patents by Inventor Kenji Ooyachi

Kenji Ooyachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7498249
    Abstract: A resist post is formed on a connection pad of a semiconductor chip, and the semiconductor chip and the resist post are covered by a heat resistant insulating layer. A surface of the insulating layer is next polished by CMP or the like, thus an upper surface of the resist post being exposed. The exposed resist post is then removed by developing processing or the like, thus forming a through hole. A conductor is then embedded in the through hole by plating, thus forming a connecting conductor, and wirings are formed. A method of forming the connecting conductor does not impart damage to the semiconductor chip.
    Type: Grant
    Filed: September 15, 2006
    Date of Patent: March 3, 2009
    Assignee: NEC Electronics Corp.
    Inventors: Shinichi Miyazaki, Hirokazu Honda, Kenji Ooyachi
  • Publication number: 20070020907
    Abstract: A resist post is formed on a connection pad of a semiconductor chip, and the semiconductor chip and the resist post are covered by a heat resistant insulating layer. A surface of the insulating layer is next polished by CMP or the like, thus an upper surface of the resist post being exposed. The exposed resist post is then removed by developing processing or the like, thus forming a through hole. A conductor is then embedded in the through hole by plating, thus forming a connecting conductor, and wirings are formed. A method of forming the connecting conductor does not impart damage to the semiconductor chip.
    Type: Application
    Filed: September 15, 2006
    Publication date: January 25, 2007
    Inventors: Shinichi Miyazaki, Hirokazu Honda, Kenji Ooyachi
  • Publication number: 20040154163
    Abstract: A resist post is formed on a connection pad of a semiconductor chip, and the semiconductor chip and the resist post are covered by a heat resistant insulating layer. A surface of the insulating layer is next polished by CMP or the like, thus an upper surface of the resist post being exposed. The exposed resist post is then removed by developing processing or the like, thus forming a through hole. A conductor is then embedded in the through hole by plating, thus forming a connecting conductor, and wirings are formed. A method of forming the connecting conductor does not impart damage to the semiconductor chip.
    Type: Application
    Filed: February 5, 2004
    Publication date: August 12, 2004
    Inventors: Shinichi Miyazaki, Hirokazu Honda, Kenji Ooyachi