Patents by Inventor Kenji Sugishima
Kenji Sugishima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20070221125Abstract: A method and system for non-invasive sensing and monitoring of a processing system employed in semiconductor manufacturing. The method allows for detecting and diagnosing drift and failures in the processing system and taking the appropriate correcting measures. The method includes positioning at least one non-invasive sensor on an outer surface of a system component of the processing system, where the at least one invasive sensor forms a wireless sensor network, acquiring a sensor signal from the at least one non-invasive sensor, where the sensor signal tracks a gradual or abrupt change in a processing state of the system component during flow of a process gas in contact with the system component, and extracting the sensor signal from the wireless sensor network to store and process the sensor signal. In one embodiment, the non-invasive sensor can be an accelerometer sensor and the wireless sensor network can be motes-based.Type: ApplicationFiled: March 24, 2006Publication date: September 27, 2007Applicant: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Kenji Sugishima, Donthineni Rao
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Publication number: 20070061652Abstract: A method of creating and/or modifying a built-in self test (BIST) table for monitoring a thermal processing system in real-time that includes positioning a plurality of wafers in a processing chamber in the thermal processing system; executing a real-time dynamic model to generate a predicted dynamic process response; creating a measured dynamic process response; determining a dynamic estimation error; determining if the determined dynamic estimation error can be associated with a pre-existing BIST rule in the BIST table; creating a new BIST rule when the dynamic estimation error cannot be associated with any pre-existing BIST rule in the BIST table; and stopping the process when a new BIST rule cannot be created.Type: ApplicationFiled: September 1, 2005Publication date: March 15, 2007Applicant: Tokyo Electron Limited, TBS Broadcast CenterInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Patent number: 7165011Abstract: A method of monitoring a thermal processing system in real-time using a built-in self test (BIST) table that includes positioning a plurality of wafers in a processing chamber in the thermal processing system; executing a real-time dynamic model to generate a predicted dynamic process response for the processing chamber during the processing time; creating a first measured dynamic process response; determining a dynamic estimation error using a difference between the predicted dynamic process response and the measured dynamic process response; and comparing the dynamic estimation error to operational thresholds established by one or more rules in the BIST table.Type: GrantFiled: September 1, 2005Date of Patent: January 16, 2007Assignee: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima, Anthony Dip, David Smith, Raymond Joe, Sundar Gandhi
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Publication number: 20060241891Abstract: A method of determining wafer curvature in real-time is presented. The method includes establishing a first temperature profile for a hotplate surface, where the hotplate surface is divided into a plurality of temperature control zones. The method further includes positioning a wafer at a first height above the hotplate surface and determining a second temperature profile for the hotplate surface. The wafer curvature is then determined by using the second temperature profile. Also, a dynamic model of a processing system is presented and wafer curvature can be incorporated into the dynamic model.Type: ApplicationFiled: March 30, 2005Publication date: October 26, 2006Inventors: Sanjeev Kaushal, Kenji Sugishima, Pradeep Pandey
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Patent number: 7101816Abstract: Methods for adaptive real time control of a system for thermal processing substrates, such as semiconductor wafers and display panels. Generally, the method includes creating a dynamic model of the thermal processing system, incorporating wafer bow in the dynamic model, coupling a diffusion-amplification model into the dynamic thermal model, creating a multivariable controller, parameterizing the nominal setpoints, creating a process sensitivity matrix, creating intelligent setpoints using an efficient optimization method and process data, and establishing recipes that select appropriate models and setpoints during run-time.Type: GrantFiled: December 29, 2003Date of Patent: September 5, 2006Assignee: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Kenji Sugishima, Pradeep Pandey
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Publication number: 20060166501Abstract: An adaptive real time thermal processing system is presented that includes a multivariable controller. The method includes creating a dynamic model of the MLD processing system and incorporating virtual sensors in the dynamic model. The method includes using process recipes comprising intelligent set points, dynamic models, and/or virtual sensors.Type: ApplicationFiled: January 26, 2005Publication date: July 27, 2006Applicant: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Publication number: 20060165890Abstract: An adaptive real time thermal processing system is presented that includes a multivariable controller. The method includes creating a dynamic model of the MLD processing system and incorporating virtual sensors in the dynamic model. The method includes using process recipes comprising intelligent set points, dynamic models, and/or virtual sensors.Type: ApplicationFiled: January 26, 2005Publication date: July 27, 2006Applicant: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Patent number: 7025280Abstract: An adaptive real time thermal processing system is presented that includes a multivariable controller. Generally, the method includes creating a dynamic model of the thermal processing system; incorporating reticle/mask curvature in the dynamic model; coupling a diffusion-amplification model into the dynamic thermal model; creating a multivariable controller; parameterizing the nominal setpoints into a vector of intelligent setpoints; creating a process sensitivity matrix; creating intelligent setpoints using an efficient optimization method and process data; and establishing recipes that select appropriate models and setpoints during run-time.Type: GrantFiled: January 30, 2004Date of Patent: April 11, 2006Assignee: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Publication number: 20050167514Abstract: An adaptive real time thermal processing system is presented that includes a multivariable controller. Generally, the method includes creating a dynamic model of the thermal processing system; incorporating reticle/mask curvature in the dynamic model; coupling a diffusion-amplification model into the dynamic thermal model; creating a multivariable controller; parameterizing the nominal setpoints into a vector of intelligent setpoints; creating a process sensitivity matrix; creating intelligent setpoints using an efficient optimization method and process data; and establishing recipes that select appropriate models and setpoints during run-time.Type: ApplicationFiled: January 30, 2004Publication date: August 4, 2005Inventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Publication number: 20050149886Abstract: Methods for adaptive real time control of a system for thermal processing substrates, such as semiconductor wafers and display panels. Generally, the method includes creating a dynamic model of the thermal processing system, incorporating wafer bow in the dynamic model, coupling a diffusion-amplification model into the dynamic thermal model, creating a multivariable controller, parameterizing the nominal setpoints, creating a process sensitivity matrix, creating intelligent setpoints using an efficient optimization method and process data, and establishing recipes that select appropriate models and setpoints during run-time.Type: ApplicationFiled: December 29, 2003Publication date: July 7, 2005Inventors: Sanjeev Kaushal, Kenji Sugishima, Pradeep Pandey
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Patent number: 5557105Abstract: A pattern inspection apparatus is designed to quickly and accurately perform an inspection of an inspection sample, such as a mask or a wafer or the like by irradiating electron beams onto the inspection sample and detecting secondary or backscattered electrons reflected from the surface of the inspection sample and/or transmitted electrons passing through the inspection sample. The pattern inspection apparatus includes an electron beam generator including at least one electron gun for generating at least one electron beam irradiating onto the surface of the inspection sample. A movable support is provided for supporting the inspection sample. The apparatus also includes a detector unit having a plurality of electron detecting elements for detecting electrons containing information related to the construction of the inspection sample and a detection signal processor for processing simultaneously or in parallel formation the outputs of the electron detecting elements of the detector.Type: GrantFiled: October 11, 1994Date of Patent: September 17, 1996Assignee: Fujitsu LimitedInventors: Ichiro Honjo, Kenji Sugishima, Masaki Yamabe
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Patent number: 5541023Abstract: An X-ray absorbing film including an X-ray absorbing pattern of an X-ray mask uses .beta.-crystalline tantalum having the plane orientation of (002). The .beta.-crystalline tantalum film is formed by depositing tantalum on an amorphous layer. Because the film stress change due to heat is small, the strain of the X-ray absorbing pattern formed through a thermal treatment process is decreased.When heating the X-ray absorbing film before implanting ions into the film, the stress change of the film after implanted with ions decreases and the X-ray absorbing pattern strain also decreases.Type: GrantFiled: May 28, 1993Date of Patent: July 30, 1996Assignee: Fujitsu LimitedInventors: Kazuaki Kondo, Kenji Sugishima
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Patent number: 5430292Abstract: A pattern inspection apparatus is designed to quickly and accurately perform an inspection of an inspecting sample, such as masks, wafers or so forth by irradiating electron beams onto the inspection sample and detecting a secondary electron or a backscattered electron reflected from the surface of the inspecting sample or a transmission electron passing through the inspection sample. The pattern inspection apparatus includes an electron beam generating means including at least one electron gun for generating at least one electron beam irradiating on the surface of the inspecting sample, a movable means for supporting the inspecting sample, a detecting means including a plurality of electron detecting elements for detecting electrons containing information related to the construction of the inspection sample and a detection signal processing means for processing simultaneously or in parallel formation the outputs of the electron detecting elements of the detecting means.Type: GrantFiled: October 12, 1993Date of Patent: July 4, 1995Assignee: Fujitsu LimitedInventors: Ichiro Honjo, Kenji Sugishima, Masaki Yamabe
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Patent number: 5384463Abstract: A pattern inspection apparatus is designed to quickly and accurately perform an inspection of an inspection sample, such as a mask or a wafer or the like by irradiating electron beams onto the inspection sample and detecting secondary or backscattered electrons reflected from the surface of the inspection sample and/or transmitted electrons passing through the inspection sample. The pattern inspection apparatus includes an electron beam generator including at least one electron gun for generating at least one electron beam irradiating onto the surface of the inspection sample. A movable support is provided for supporting the inspection sample. The apparatus also includes a detector unit having a plurality of electron detecting elements for detecting electrons containing information related to the construction of the inspection sample and a detection signal processor for processing simultaneously or in parallel formation the outputs of the electron detecting elements of the detector.Type: GrantFiled: May 5, 1994Date of Patent: January 24, 1995Assignee: Fujisu LimitedInventors: Ichiro Honjo, Kenji Sugishima, Masaki Yamabe
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Patent number: 5126220Abstract: A reticle comprises a substrate transparent to an optical beam, an opaque layer provided on the substrate for interrupting the optical beam according to the desired pattern, the opaque layer being patterned to form an opaque pattern that interrupts the optical beam and a transparent pattern that transmits the optical beam selectively according to the desired pattern; and a phase shift pattern transparent to the optical beam for transmitting the optical beam therethrough, wherein the phase shift pattern comprises an electrically conductive material and provided on the substrate in correspondence to the transparent pattern in the opaque layer, for canceling the diffraction of the optical beam passed through the transparent pattern.Type: GrantFiled: January 31, 1991Date of Patent: June 30, 1992Assignee: Fujitsu LimitedInventors: Kazuo Tokitomo, Yasutaka Ban, Kenji Sugishima
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Patent number: 4748646Abstract: An X-ray lithography system, in which an X-ray beam is separated from synchrotron radiation beams and reflected by a scanning mirror which vertically scans the reflected X-ray beam. The X-ray is irradiated into an exposure chamber via a beryllium window, which is vertically oscillated in such a manner that the beryllium window is shifted up and down in synchronization with the scanning operation of the X-ray beam.Type: GrantFiled: March 18, 1987Date of Patent: May 31, 1988Assignee: Fujitsu LimitedInventors: Toshihiko Osada, Ichiro Honjo, Kenji Sugishima
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Patent number: 4684315Abstract: A frictionless supporting apparatus comprising a horizontally plane working table having magnet portions on its peripheries. Pairs of stationary magnets define therebetween a vertical space into which the working table is inserted. Magnetic repulsion between the magnet portions of the working table and the pairs of stationary magnets frictionlessly hold the working table between the pairs of stationary magnets. The working table also has vertical guide portions made of magnets extending along a predetermined one horizontal direction. A plane auxiliary table is arranged substantially in parallel to the working table. A motor is mounted on the auxiliary table for moving the working table in the predetermined one horizontal direction with respect to the auxiliary table. Pairs of guide magnets are provided on the auxiliary table, defining therebetween a horizontal space into which the guide portions of the working table are inserted.Type: GrantFiled: January 31, 1986Date of Patent: August 4, 1987Assignee: Fujitsu LimitedInventors: Kenji Sugishima, Hiroshi Yasuda
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Patent number: 4678919Abstract: An electron beam exposure system for producing a desired pattern on a workpiece. The pattern is specified by predetermined pattern data. The pattern data is modified with correction data. The correction data is obtained from information indicating variations on the level of the surface of the workpiece due to an elastic deformation thereof during the exposure process. With the use of the correction data, the desired pattern is correctly reproduced as intended when the workpiece is fully supported and the surface thereof recovers its flatness.Type: GrantFiled: July 14, 1986Date of Patent: July 7, 1987Assignee: Fujitsu LimitedInventors: Kenji Sugishima, Kenji Nakagawa
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Patent number: 4377031Abstract: Generally, a complicated process is required in manufacturing a semiconductor device containing a Schottky barrier diode and a polycrystalline silicon layer which prevents excessive reaction of the aluminum electrode and silicon material involved. Because of the inability of the aluminum electrode to provide a good Schottky barrier by its contact with the polycrystalline silicon layer, it is required to directly contact the electrode with a monocrystalline silicon semiconductor layer or substrate. According to the present invention, this process is simplified by monocrystallizing the polycrystalline silicon layer at least in the region in which a Schottky barrier diode is to be formed by annealing the silicon layer in said region by laser beam irradiation and applying an aluminum electrode thereto.Type: GrantFiled: April 1, 1981Date of Patent: March 22, 1983Assignee: Fujitsu LimitedInventors: Hiroshi Goto, Kenji Sugishima
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Patent number: 4352724Abstract: A method of manufacturing a semiconductor device having a multi-layer structure comprises the steps of patterning in accordance with a predetermined pattern a thin film of photoresist formed on a film to be etched which has been formed on a semiconductor substrate, etching the film to be etched partly by an isotropic etching using said patterned film as a mask, completing the etching by an anisotropic etching in the direction of its depth, resulting in tapered or inclined sides on the etched film. The isotropic and anisotropic etchings may be carried out in the same apparatus by changing the reactive gases used in these etchings and/or the conditions of each etching, such as the amount of gas, the gas pressure and the applied radio frequency power.Type: GrantFiled: November 19, 1980Date of Patent: October 5, 1982Assignee: Fujitsu LimitedInventors: Kenji Sugishima, Tadakazu Takada